TIBPAL22V10-15BC

TIBPAL22V10-15BC HIGH-PERFORMANCE IMPACT-X ™ PROGRAMMABLE ARRAY LOGIC CIRCUITS SRPS009A – D3356, OCTOBER 1989 – REVISED JUNE 1990 Second-Generation PLD Architecture High-Performance Operation: fmax (External Feedback) . . . 40 MHz Propagation Delay . . . 15 ns Max Increased Logic Power – Up to 22 Inputs and 10 Outputs Increased Product Terms – Average of 12 per Output Variable Product Term Distribution Allows More Complex Functions to Be Implemented Each Output Is User Programmable for Registered or Combinational Operation, Polarity, and Output Enable Control Power-Up Clear on Registered Outputs TTL-Level Preload for Improved Testability Extra Terms Provide Logical Synchronous Set and Asynchronous Reset Capability Fast Programming, High Programming Yield, and Unsurpassed Reliability Ensured Using Ti-W Fuses AC and DC Testing Done at the Factory Utilizing Special Designed-In Test Features Dependable Texas Instruments Quality and Reliability Package Options Include Plastic Dual-In-Line and Chip Carrier Packages description NT PACKAGE (TOP VIEW) CLK/I I I I I I I I I I I GND 1 2 3 4 5 6 7 8 9 10 11 12 24 VCC 23 I/O/Q 22 I/O/Q 21 I/O/Q 20 I/O/Q 19 I/O/Q 18 I/O/Q 17 I/O/Q 16 I/O/Q 15 I/O/Q 14 I/O/Q 13 I FN PACKAGE (TOP VIEW) I I CLK/I NC VCC I/O/Q I/O/Q 4 3 2 1 28 27 26 I5 25 I/O/Q I6 24 I/O/Q I7 23 I/O/Q NC 8 22 NC I9 21 I/O/Q I 10 20 I/O/Q I 11 19 I/O/Q 12 13 14 15 16 17 18 I I GND NC I I/O/Q I/O/Q NC – No internal connection P...