TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS
D Trimmed Offset Voltage:
TLC27M7 ....
TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 Lin
CMOS PRECISION DUAL OPERATIONAL
AMPLIFIERS
D Trimmed Offset
Voltage:
TLC27M7 . . . 500 µV Max at 25°C, VDD = 5 V
D Input Offset
Voltage Drift . . . Typically
0.1 µV/Month, Including the First 30 Days
D Wide Range of Supply
Voltages Over
Specified Temperature Ranges: 0°C to 70°C . . . 3 V to 16 V −40°C to 85°C . . . 4 V to 16 V −55°C to 125°C . . . 4 V to 16 V
D Single-Supply Operation
D Common-Mode Input
Voltage Range
Extends Below the Negative Rail (C-Suffix, I-Suffix Types)
SLOS051E − OCTOBER 1987 − REVISED AUGUST 2008
D Low Noise . . . Typically 32 nV/√Hz at
f = 1 kHz
D Low Power . . . Typically 2.1 mW at 25°C,
VDD = 5 V
D Output
Voltage Range Includes Negative
Rail
D High Input impedance . . . 1012 Ω Typ D ESD-Protection Circuitry D Small-Outline Package Option Also
Available in Tape and Reel
D Designed-In Latch-Up Immunity
D, JG, P OR PW PACKAGE (TOP VIEW)
1OUT 1 1IN − 2 1IN + 3 GND 4
8 VCC 7 2OUT 6 2IN − 5 2IN +
FK PACKAGE (TOP VIEW)
NC 1OUT NC VDD NC
NC 1IN −
NC 1IN +
NC
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC 2OUT NC 2IN − NC
Percentage of Units − %
DISTRIBUTION OF TLC27M7
INPUT OFFSET
VOLTAGE
30
340 Units Tested From 2 Wafer Lots
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 25
VDD = 5 V TA = 25°C
P Package
20
15
10
5
NC GND
NC 2IN +
NC
NC − No internal connection
0
−800 −400
0
400
800
VIO − Input Offset
Voltage − µV
AVAILABLE OPTIONS
PACKAGE
TA
VIOmax AT 25°C
SMALL OUTLINE CHIP CARRIER
CE...