TMS320C206, TMS320LC206 DIGITAL SIGNAL PROCESSORS
D High-Performance Static CMOS Technology D Includes the ’320C2xLP Co...
TMS320C206, TMS320LC206 DIGITAL SIGNAL PROCESSORS
D High-Performance Static
CMOS Technology D Includes the ’320C2xLP Core CPU D TMS320C206, TMS320LC206 are Members
of the ’C20x/’C2000 Platform Which Also
Includes the TMS320C203/LC203 and
TMS320F206 Devices
D Instruction-Cycle Time 25 ns at 3.3 V D Source Code Compatible With TMS320C25
and other ’20x Devices
D Upwardly Code-Compatible With
TMS320C5x Devices
D Four External Interrupts D TMS320C206, 5-V I/O (3.3-V core) D TMS320LC206, 3.3-V core and I/O D TMS320C206, TMS320LC206 Integrated
Memory:
– 544 × 16 Words of On-Chip Dual-Access Data RAM
– 32K × 16 Words of On-Chip ROM – 4K × 16 Words of On-Chip Single-Access
Program/ Data RAM
D 224K × 16-Bit Maximum Addressable
External Memory Space
– 64K Program
– 64K Data
– 64K Input/Output (I/O)
– 32K Global
SPRS065B – JUNE 1998 – REVISED JANUARY 1999
D 32-Bit Arithmetic Logic Unit (ALU )
Accumulator
D 16 × 16-Bit Multiplier With a 32-Bit Product D Block Moves from Data and Program
Space
D TMS320C206, TMS320LC206 Peripherals:
– On-Chip 20-Bit Timer
– On-Chip Software-Programmable
Wait-State (0 to 7) Generator
– On-Chip Oscillator
– On-Chip Phase-Locked Loop (PLL)
– Six General-Purpose I/O Pins
– Full-Duplex Asynchronous Serial Port
(UART)
– Enhanced Synchronous Serial Port
(ESSP) With Four-Level-Deep FIFOs
D Input Clock Options
– Options: Multiply-by-One, -Two, or -Four, and Divide-by-Two ( 1, 2, 4, and 2)
D Support of Hardware Wait States D Power Down IDLE Mode D IEEE 1149....
