TMS320C6415

TMS320C6414, TMS320C6415, TMS320C6416 FIXED-POINT DIGITAL SIGNAL PROCESSORS SPRS146N − FEBRUARY 2001 − REVISED MAY 2005 D Highest-Performance Fixed-Point Digital D Two External Memory Interfaces (EMIFs) Signal Processors (DSPs) − One 64-Bit (EMIFA), One 16-Bit (EMIFB) − 2-, 1.67-, 1.39-ns Instruction Cycle Time − Glueless Interface to Asynchronous − 500-, 600-, 720-MHz Clock Rate Memories (SRAM and EPROM) and − Eight 32-Bit Instructions/Cycle Synchronous Memories (SDRAM, − Twenty-Eight Operations/Cycle SBSRAM, ZBT SRAM, and FIFO) − 4000, 4800, 5760 MIPS − 1280M-Byte Total Addressable External − Fully Software-Compatible With C62x™ Memory Space − C6414/15/16 Devices Pin-Compatible D VelociTI.2™ Extensions to VelociTI™ D Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels) Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x™ DSP Core − Eight Highly Independent Functional Units With VelociTI.2™ Extensions: − Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle − Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle − Non-Aligned Load-Store Architecture − 64 32-Bit General-Purpose Registers − Instruction Packing Reduces Code Size − All Instructions Conditional D Instruction Set Features − Byte-Addressable (8-/16-/32-/64-Bit Data) − 8-Bit Overflow Protection − Bit-Field Extract, Set, Clear − No...