TMS320C6415T

TMS320C6414T, TMS320C6415T, TMS320C6416T FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS SPRS226M − NOVEMBER 2003 − REVISED APRIL 2009 D Highest-Performance Fixed-Point DSPs D Two External Memory Interfaces (EMIFs) − 1.67-/1.39-/1.17-/1-ns Instruction Cycle − One 64-Bit (EMIFA), One 16-Bit (EMIFB) − 600-/720-/850-MHz, 1-GHz Clock Rate − Glueless Interface to Asynchronous − Eight 32-Bit Instructions/Cycle Memories (SRAM and EPROM) and − Twenty-Eight Operations/Cycle Synchronous Memories (SDRAM, − 4800, 5760, 6800, 8000 MIPS SBSRAM, ZBT SRAM, and FIFO) − Fully Software-Compatible With C62x − 1280M-Byte Total Addressable External − C6414/15/16 Devices Pin-Compatible Memory Space − Extended Temperature Devices Available D VelociTI.2 Extensions to VelociTI D Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels) Advanced Very-Long-Instruction-Word (VLIW) TMS320C64x DSP Core − Eight Highly Independent Functional Units With VelociTI.2 Extensions: − Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle − Two Multipliers Support Four 16 x 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 x 8-Bit Multiplies (16-Bit Results) per Clock Cycle − Non-Aligned Load-Store Architecture − 64 32-Bit General-Purpose Registers − Instruction Packing Reduces Code Size − All Instructions Conditional D Instruction Set Features − Byte-Addressable (8-/16-/32-/64-Bit Data) − 8-Bit Overflow Protection − Bit-Fi...