TMS320F28020

www.ti.com TMS320F28027, TMS320F28027-Q1, TMS320F28027F, TMS320F28027F-Q1, TMS320F28026 TMS320F28027, TTMMSS332200FF2288002267--QQ11,, TTMMSS332200FF2288002267FF,, TTMMSS332200FF2288002267FF--QQ11,, TTMMSS332200FF2288002236 TMS320F28T0M23S-Q3210,FT2M8S02362-0QF12,8T0M22S,3T2M0SF2382002F62F8,0T21M,ST3M2S0F32208F02268F02-Q0,1T, TMMSS32302F0F28208200203 TMS320F28023-Q1, TMS320F28022, TMSSP3R2S05F232P8–02N1O,VTEMMBSE3R2200F0828–0R2E0V,ISTEMD SFE3B2R0UFA2R8Y02200201 SPRS523P – NOVEMBER 2008 – REVISED FEBRUARY 2021 TMS320F2802x Microcontrollers 1 Features High-efficiency 32-bit CPU (TMS320C28x) – 60 MHz (16.67-ns cycle time) – 50 MHz (20-ns cycle time) – 40 MHz (25-ns cycle time) – 16 × 16 and 32 × 32 MAC operations – 16 × 16 dual MAC – Harvard bus architecture – Atomic operations – Fast interrupt response and processing – Unified memory programming model – Code-efficient (in C/C++ and Assembly) Endianness: Little endian Low cost for both device and system: – Single 3.3-V supply – No power sequencing requirement – Integrated power-on and brown-out resets – Small packaging, as low as 38-pin available – Low power – No analog support pins Clocking: – Two internal zero-pin oscillators – On-chip crystal oscillator and external clock input – Watchdog timer module – Missing clock detection circuitry Up to 22 individually programmable, multiplexed GPIO pins with input filtering Peripheral Interrupt Expansion (PIE) block that supports all peripheral interrupts Three 32-bit C...