D High-Performance Static CMOS Technology
− 25-ns Instruction Cycle Time (40 MHz) − 40-MIPS Performance − Low-Power 3.3-...
D High-Performance Static
CMOS Technology
− 25-ns Instruction Cycle Time (40 MHz) − 40-MIPS Performance − Low-Power 3.3-V Design
D Based on TMS320C2xx DSP CPU Core
− Code-Compatible With 240x and F243/F241/C242
− Instruction Set Compatible With F240/C240
D On-Chip Memory
− Up to 8K Words x 16 Bits of Flash EEPROM (2 Sectors) (LF2401A)
− 8K Words x 16 Bits of ROM (LC2401A) − Programmable “Code-Security” Feature
for the On-Chip Flash/ROM − Up to 1K Words x 16 Bits of
Data/Program RAM − 544 Words of Dual-Access RAM − Up to 512 Words of Single-Access
RAM
D Boot ROM
− SCI Bootloader
D Event-Manager (EV) Module (EVA), Which
Includes: − Two 16-Bit General-Purpose Timers − Seven 16-Bit Pulse-Width Modulation
(PWM) Channels Which Enable: − Three-Phase Inverter Control − Center- or Edge-Alignment of PWM
Channels − Emergency PWM Channel Shutdown
With External PDPINTA Pin − Programmable Deadband (Deadtime)
Prevents Shoot-Through Faults − One Capture Unit for Time-Stamping of
External Events − Input Qualifier for Select Pins − Synchronized A-to-D Conversion − Designed for AC Induction, BLDC,
Switched Reluctance, and Stepper Motor Control
TMS320LF2401A, TMS320LC2401A DSP CONTROLLERS
SPRS161H − MARCH 2001 − REVISED MARCH 2004
D Small Foot-Print (7 mm × 7 mm) Ideally
Suited for Space-Constrained Applications
D Watchdog (WD) Timer Module D 10-Bit Analog-to-Digital Converter (ADC)
− 5 Multiplexed Input Channels − 500 ns Minimum Conversion Time − Selectable Twin 8-State Sequencers
Triggered by...