TMS320LF2407, TMS320LF2406, TMS320LF2402 DSP CONTROLLERS
D TMS320LF2407, TMS320LF2406, and
TMS320LF2402 are Being Repla...
TMS320LF2407, TMS320LF2406, TMS320LF2402 DSP CONTROLLERS
D TMS320LF2407, TMS320LF2406, and
TMS320LF2402 are Being Replaced by TMS320LF2407A, TMS320LF2406A, and TMS320LF2402A, Respectively. Hence, TMS320LF2407, TMS320LF2406, and TMS320LF2402 are NOT RECOMMENDED FOR NEW DESIGNS (NRND).
D High-Performance Static
CMOS Technology
− 33-ns Instruction Cycle Time (30 MHz) − 30-MIPS Performance − Low-Power 3.3-V Design
D Based on TMS320C2xx DSP CPU Core
− Code-Compatible With F243/F241/C242 − Instruction Set and Module Compatible
With F240/C240
D On-Chip Memory
− Up to 32K Words x 16 Bits of Flash EEPROM (4 Sectors)
− Up to 2.5K Words x 16 Bits of Data/Program RAM − 544 Words of Dual-Access RAM − Up to 2K Words of Single-Access RAM
D Boot ROM
− SCI/SPI Bootloader
D Two Event-Manager (EV) Modules (EVA and
EVB), Each Include: − Two 16-Bit General-Purpose Timers − Eight 16-Bit Pulse-Width Modulation
(PWM) Channels Which Enable: − Three-Phase Inverter Control − Center- or Edge-Alignment of PWM
Channels − Emergency PWM Channel Shutdown
With External PDPINTx Pin − Programmable Deadband (Deadtime)
Prevents Shoot-Through Faults − Three Capture Units For Time-Stamping
of External Events − On-Chip Position Encoder Interface
Circuitry − Synchronized Analog-to-Digital
Conversion − Designed for AC Induction, BLDC,
Switched Reluctance, and Stepper Motor Control − Applicable for Multiple Motor and/or Converter Control
SPRS094I − APRIL 1999 − REVISED SEPTEMBER 2003
D External Memory Interface (LF24...