TMS320P25

ADVANCE INFORMATION Instruction Cycle Time of 100 ns (40 MHz) 4K Words of On-Chip Secure Program EPROM 544 Words of On-Chip Data RAM 128K Words of Data/Program Space 16 Parallel I/O Ports 32-Bit ALU/Accumulator 16 × 16-Bit Multiplier With a 32-Bit Product Block Moves for Data/Program Management Repeat Instructions for Efficient Use of Program Space Serial Port for Direct Codec Interface Synchronization Input for Synchronous Multiprocessor Configurations Wait States for Communication to Slow Off-Chip Memories/Peripherals On-Chip Timer for Control Operations Single 5-V Supply Packaging: – 68-Lead Plastic J-Leaded Chip Carrier (FN Suffix) – 80-Lead Plastic Quad Flatpack (PH Suffix) 68-to-28-Lead Conversion Adapter Socket for EPROM Programming description The TMS320P25 digital signal processor is a member of the TMS320 family of VLSI digital signal processors and peripherals. The TMS320 family supports a wide range of digital signal processing applications, such as telecommunications, modems, image processing, speech processing, spectrum analysis, audio processing, digital filtering, high-speed control, graphics, and other computation intensive applications. With a 100-ns instruction cycle time and an innovative memory configuration, the ’320P25 performs operations necessary for many real-time digital signal processing algorithms. Since most instructions require only one cycle, the TMS320P25 is capable of executing ten million ins...