TMS626812B
1 048 576 BY 8-BIT BY 2-BANK
SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES
SMOS693A – OCTOBER 1997 – REVISED APRIL 1998
D Organization
1048576 by 8 Bits by 2 Banks
D 3.3-V Power Supply (± 10% Tolerance) D Two Banks for On-Chip Interleaving
(Gapless Accesses)
D High Bandwidth – Up to 125-MHz Data
Rates
D CAS Latency (CL) Programmable to
2 or 3 Cycles...
