TPIC6B596 POWER LOGIC 8ĆBIT SHIFT REGISTER
SLIS095A − MARCH 2000 − REVISED MAY 2005
D Low rDS(on) . . . 5 Ω D Avalanch...
TPIC6B596 POWER LOGIC 8ĆBIT SHIFT REGISTER
SLIS095A − MARCH 2000 − REVISED MAY 2005
D Low rDS(on) . . . 5 Ω D Avalanche Energy . . . 30 mJ D Eight Power DMOS-Transistor Outputs of
150-mA Continuous Current
D 500-mA Typical Current-Limiting Capability D Output Clamp
Voltage . . . 50 V D Enhanced Cascading for Multiple Stages D All Registers Cleared With Single Input D Low Power Consumption
description
DW OR N PACKAGE (TOP VIEW)
NC 1 VCC 2 SER IN 3 DRAIN0 4 DRAIN1 5 DRAIN2 6 DRAIN3 7 SRCLR 8
G9 GND 10
20 NC 19 GND 18 SER OUT 17 DRAIN7 16 DRAIN6 15 DRAIN5 14 DRAIN4 13 SRCK 12 RCK 11 GND
The TPIC6B596 is a monolithic, high-
voltage,
NC − No internal connection
medium-current power 8-bit shift register designed for use in systems that require relatively
logic symbol†
high load power. The device contains a built-in
voltage clamp on the outputs for inductive transient protection. Power driver applications
G9 RCK 12
EN3 C2
include relays, solenoids, and other mediumcurrent or high-
voltage loads.
This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shiftregister clear (SRCLR) is high. When SRCLR is low, all registers in the device are cleared. When output enable (G) is held high, all data in the o...