TPS53625

TPS53625 SLUSEW7 – JUNE 2022 TPS53625 2-Phase, D-CAP+™ Step-Down Controller for VR12.0 VCPU 1 Features VR12.0 serial VID (SVID) compliant 1- or 2-phase operation Supports both zero-load and non-zero-load line applications 8-Bit DAC output range: 0.25 V to 1.52 V Optimized efficiency at light and heavy loads 8 independent levels of overshoot reduction (OSR) and undershoot reduction (USR) Driverless configuration for efficient high-frequency switching Supports discrete, Power Block, Power Stage or DrMOS MOSFET implementations Accurate, adjustable voltage positioning 300-kHz to 1-MHz frequency selections Patented AutoBalance Phase Balancing Selectable 8-level current limit 4.5-V to 28-V conversion voltage range Small, 4 mm × 4 mm, 32-Pin, VQFN PowerPAD™ integrated circuit package 2 Applications Core Memory 3 Description The TPS53625 device is a driverless, fully SVID compliant, VR12.0 step-down controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The TPS53625 device also supports single-phase operation in CCM or DCM for lightload efficiency. The TPS53625 device integrates the full complement of VR12.0 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 0 to 7. Adjustable control of VOUT slew rate and voltage posi...