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U637256 Datasheet

Part Number U637256
Manufacturers Simteh
Logo Simteh
Description CapStore 32K x 8 nvSRAM
Datasheet U637256 DatasheetU637256 Datasheet (PDF)

www.DataSheet4U.com U637256 CapStore 32K x 8 nvSRAM Features ‡ CMOS non volatile static RAM 32768 x 8 bits ‡ 70 ns Access Time ‡ 35 ns Output Enable Access Time ‡ ICC = 15 mA typ. at 200 ns Cycle Time ‡ Unlimited Read and Write Cycles to SRAM ‡ Automatic STORE to EEPROM on Power Down using charge stored in an integrated capacitor ‡ Software initiated STORE ‡ Automatic STORE Timing ‡ 106 STORE cycles to EEPROM ‡ 100 years data retention in EEPROM ‡ Automatic RECALL on Power Up ‡ Software RECALL .

  U637256   U637256






CapStore 32K x 8 nvSRAM

www.DataSheet4U.com U637256 CapStore 32K x 8 nvSRAM Features ‡ CMOS non volatile static RAM 32768 x 8 bits ‡ 70 ns Access Time ‡ 35 ns Output Enable Access Time ‡ ICC = 15 mA typ. at 200 ns Cycle Time ‡ Unlimited Read and Write Cycles to SRAM ‡ Automatic STORE to EEPROM on Power Down using charge stored in an integrated capacitor ‡ Software initiated STORE ‡ Automatic STORE Timing ‡ 106 STORE cycles to EEPROM ‡ 100 years data retention in EEPROM ‡ Automatic RECALL on Power Up ‡ Software RECALL Initiation ‡ Unlimited RECALL cycles from EEPROM ‡ Single 5 V ± 10 % Operation ‡ Operating temperature range: 0 to 70 °C -40 to 85°C ‡ QS 9000 Quality Standard (MIL STD 883C M3015.7) ‡ RoHS compliance and Pb- free Package: PDIP28 (600 mil) Description The U637256 has two separate modes of operation: SRAM mode and nonvolatile mode. In SRAM mode, the memory operates as an ordinary static RAM. In nonvolatile operation, data is transferred in parallel from SRAM to EEPROM or from EEPROM to SRAM. In this mode SRAM functions are disabled. The U637256 is a static RAM with a nonvolatile electrically erasable PROM (EEPROM) element incorporated in each static memory cell. The SRAM can be read and written an unlimited number of times, while independent nonvolatile data resides in EEPROM. Data transfers from the SRAM to the EEPROM (the STORE operation) take place automatically upon power down using charge stored in an integraed capacitor. Transfers from the EEPROM to the SRAM (the RECALL operation).


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