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X5329

Intersil Corporation

(X5328 / X5329) CPU Supervisor with 32Kbit SPI EEPROM

® X5328, X5329 (Replaces X25328, X25329) Data Sheet October 17, 2005 FN8132.1 CPU Supervisor with 32Kbit SPI EEPROM FE...


Intersil Corporation

X5329

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Description
® X5328, X5329 (Replaces X25328, X25329) Data Sheet October 17, 2005 FN8132.1 CPU Supervisor with 32Kbit SPI EEPROM FEATURES Low VCC detection and reset assertion —Five standard reset threshold voltages —Re-program low VCC reset threshold voltage using special programming sequence —Reset signal valid to VCC = 1V Long battery life with low power consumption —<1µA max standby current —<400µA max active current during read 32Kbits of EEPROM Built-in inadvertent write protection —Power-up/power-down protection circuitry —Protect 0, 1/4, 1/2 or all of EEPROM array with Block Lock™ protection —In circuit programmable ROM mode 2MHz SPI interface modes (0,0 & 1,1) Minimize EEPROM programming time —32-byte page write mode —Self-timed write cycle —5ms write cycle time (typical) 2.7V to 5.5V and 4.5V to 5.5V power supply operation Available packages —14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP Pb-free plus anneal available (RoHS compliant) BLOCK DIAGRAM WP SI SO SCK CS Data Register Command Decode & Control Logic DESCRIPTION These devices combine three popular functions, Poweron Reset Control, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reliability. Applying power to the device activates the power-on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor can ex...




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