X930A

ADVANCE INFORMATION 8x930Ax UNIVERSAL SERIAL BUS MICROCONTROLLER s Complete Universal Serial Bus Specification 1.0 Compatibility — Supports Isochronous and Non-isochronous Data — Bidirectional Half-duplex Link s On-chip USB Transceiver s Serial Bus Interface Engine (SIE) — Packet Decoding/Generation — CRC Generation and Checking — NRZI Encoding/Decoding and Bit-stuffing s USB Reset Interrupt s Four Transmit FIFOs — Three 16-byte FIFOs — One Configurable FIFO (up to 1 Kbyte) s Four Receive FIFOs — Three 16-byte FIFOs — One Configurable FIFO (up to 1 Kbyte) s Automatic Transmit/Receive FIFO Management s Suspend/Resume Operation s Three New USB Interrupt Vectors — USB Function Interrupt — Start of Frame — Suspend/Resume s Phase-locked Loop — 12 Mbps or 1.5 Mbps Data Rate s Low Clock Mode s User-selectable Configurations — External Wait State — Address Range — Page Mode s Real-time Wait Function s 256-Kbyte External Code/Data Memory Space s On-chip ROM Options — 0, 8, or 16 Kbytes s 1 Kbyte On-chip Data RAM s Four Input/Output Ports — 1 Open-drain port — 3 Quasi-bidirectional Ports s Programmable Counter Array (PCA) — 5 Capture/Compare Modules s Serial I/O Port (UART) s Hardware Watchdog Timer s Three Flexible 16-bit Timer/Counters s Power-saving Idle and Powerdown Modes s Register-based MCS® 251 Architecture — 40-byte Register File — Registers Accessible as Bytes, Words, or Doublewords s Code Compatible with MCS 51 and MCS 251 Microcontrollers s 6 or 12 MHz Crystal Operation T...