INTEGRATED CIRCUITS
XA-SCC CMOS 16-bit communications microcontroller
Preliminary specification Supersedes data of 1999 Feb 23 IC25 Data Handbook 1999 Mar 29
Philips Semiconductors
Philips Semiconductors
Preliminary specification
CMOS 16-bit communications microcontroller
XA-SCC
GENERAL DESCRIPTION
The XA-SCC device is a member of Philips’ XA (eXtended Architecture) family of high performance 16-bit single-chip microcontrollers. The XA-SCC includes a complete onboard DRAM controller capab.
CMOS 16-bit communications microcontroller
INTEGRATED CIRCUITS
XA-SCC CMOS 16-bit communications microcontroller
Preliminary specification Supersedes data of 1999 Feb 23 IC25 Data Handbook 1999 Mar 29
Philips Semiconductors
Philips Semiconductors
Preliminary specification
CMOS 16-bit communications microcontroller
XA-SCC
GENERAL DESCRIPTION
The XA-SCC device is a member of Philips’ XA (eXtended Architecture) family of high performance 16-bit single-chip microcontrollers. The XA-SCC includes a complete onboard DRAM controller capable of supporting up to 32MegaBytes of DRAM. The XA-SCC device combines many powerful communications oriented peripherals on one chip. 4 Full Function SCC’s, 8 DMA channels (2 per SCC), hardware autobaud up to 921.6Kbps, IDL TDM interface, two timers/counters, 1 watchdog timer, and multiple general purpose I/O ports. It is suited for many high performance embedded communications functions, including ISDN terminal adaptors and Asynchronous Muxes.
• Memory controller also generates 6 chip selects to support
SRAM, ROM, Flash, EPROM, peripheral chips, etc. without external glue.
• Supports off-chip addressing up to 32 MB (2 x 2**24 address
spaces) in Harvard architecture, or 16MB in unified memory configuration.
• A clock output reference “ClkOut” is added to simplify external bus
interfacing.
• High performance 8-channel DMA Controller offloads the CPU for
moving data to/from SCC’s and memory.
• Two standard counter/timers with enhanced features (same as
XA-G3 T0, T1). Both timers hav.