XRT94L33

www.DataSheet4U.com XRT94L33 Rev 2.0.0 3 C H A N N E L S 3 /// E 3 /// S T S 1 O T S 3 /// S T M 1 A P P E R T M E G III S T E R S 3 C H A N N E L D S 3 E 3 S T S 1 T O S T S 3 S T M 1 M A P P E R – A T M R E G S T E R S 3 C H A N N E LD D S 3 E 3 S T S 1T T OS S T S 3 S T M 1M M A P P E R– –A A T MR R E G S T E R S March 2007 GENERAL DESCRIPTION The XRT94L33 is a highly integrated SONET/SDH terminator designed for E3/DS3/STS-1 mapping/de-mapping functions from either the STS-3 or STM-1 data stream. The XRT94L33 interfaces directly to the optical transceiver The XRT94L33 processes the section, line and path overhead in the SONET/SDH data stream and also performs ATM and PPP PHY-layer processing. The processing of path overhead bytes within the STS-1s or TUG-3s includes 64 bytes for storing the J1 bytes. Path overhead bytes can be accessed through the microprocessor interface or via serial interface. The XRT94L33 uses the internal E3/DS3 DeSynchronizer circuit with an internal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. These De-Synchronizer circuits do not need any external clock reference for its operation. The SONET/SDH transmit blocks allow flexible insertion of TOH and POH bytes through both Hardware and Software. Individual POH bytes for the transmitted SONET/SDH signal are mapped either from the XRT94L33 memory map or from external interface. A1, A2 framing pattern, C1 byte and H1, H2 pointer byte a...