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YF08E Datasheet

Part Number YF08E
Manufacturers Texas Instruments
Logo Texas Instruments
Description Voltage Translator
Datasheet YF08E DatasheetYF08E Datasheet (PDF)

Product Folder Order Now Technical Documents Tools & Software Support & Community TXS0108E SCES642H – DECEMBER 2007 – REVISED MAY 2020 TXS0108E 8-Bit Bi-directional, Level-Shifting, Voltage Translator for Open-Drain and Push-Pull Applications 1 Features •1 No direction-control signal needed • Maximum data rates – 110 Mbps (push pull) – 1.2 Mbps (open drain) • 1.4 V to 3.6 V on A port and 1.65 V to 5.5 V on B port (VCCA ≤ VCCB) • No power-supply sequencing required – either VCCA or VCCB can.

  YF08E   YF08E






Voltage Translator

Product Folder Order Now Technical Documents Tools & Software Support & Community TXS0108E SCES642H – DECEMBER 2007 – REVISED MAY 2020 TXS0108E 8-Bit Bi-directional, Level-Shifting, Voltage Translator for Open-Drain and Push-Pull Applications 1 Features •1 No direction-control signal needed • Maximum data rates – 110 Mbps (push pull) – 1.2 Mbps (open drain) • 1.4 V to 3.6 V on A port and 1.65 V to 5.5 V on B port (VCCA ≤ VCCB) • No power-supply sequencing required – either VCCA or VCCB can be ramped first • Latch-up performance exceeds 100 mA per JESD 78, Class II • ESD protection exceeds JESD 22 (A Port) – 2000-V human body model (A114-B) – 150-V machine model (A115-A) – 1000-V charged-device model (C101) • IEC 61000-4-2 ESD (B port) – ±8 kV contact discharge – ±6 kV Air-gap discharge 2 Applications • Handsets • Smartphones • Tablets • Desktop PCs 3 Description This device is an 8-bit non-inverting level translator that uses two separate configurable power-supply rails. The A port tracks the VCCA pin supply voltage. The VCCA pin accepts any supply voltage between 1.4 V and 3.6 V. The B port tracks the VCCB pin supply voltage. The VCCB pin accepts any supply voltage between 1.65 V and 5.5 V. Two input supply pins allows for low Voltage bidirectional translation between any of the 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes. When the output-enable (OE) input is low, all outputs are placed in the high-impedance (Hi-Z) state. To ensure the Hi-Z state during power-up.


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