| Part Number | ICS97U8770 |
| Manufacturer | Renesas (https://www.renesas.com/) |
| Title | 1.8V Wide Range Frequency Clock Driver |
| Description | Terminal Name AGND AVDD CLK_INT CLK_INC FB_INT FB_INC FB_OUTT FB_OUTC Description Analog Ground Analog power Clock input with a (10K-100K Ohm) ... |
| Features |
A and a 40-pin MLF.
ICS97U870 is a zero delay buffer that distributes a differential clock input pair(CLK_INT, CLK_INC) to ten differential pair of clock outputs(CLKT[0:9], CLKC[0:91) and one differential pair feedback clock outputs(FB_OUTT, FBOUTC). The clock outputs are controlled by the input cl... |
| Datasheet | ICS97U8770 pdf datasheet - 1.91MB |
| Part Number | ICS97U877 |
| Manufacturer | Renesas |
| Title | 1.8V Wide Range Frequency Clock Driver |
| Description | Features: • Low skew, low jitter PLL clock driver • 1 to 10 differential clock distribution (SSTL_18) • Feedback pins for input to output synchron. |
| Features |
• Low skew, low jitter PLL clock driver • 1 to 10 differential clock distribution (SSTL_18) • Feedback pins for input to output synchronization • Spread Spectrum tolerant inputs • Auto PD when input signal is at a certain logic state Switching Characteristics: • Period jitter: 40ps • Half-period ji. |
| Datasheet | ICS97U877 pdf datasheet |
| Part Number | ICS97U877 |
| Manufacturer | Integrated Circuit Solution Inc |
| Title | 1.8V Wide Range Frequency Clock Driver |
| Description | Features: • Low skew, low jitter PLL clock driver • 1 to 10 differential clock distribution (SSTL_18) • Feedback pins for input to output synchron. |
| Features |
• Low skew, low jitter PLL clock driver • 1 to 10 differential clock distribution (SSTL_18) • Feedback pins for input to output synchronization • Spread Spectrum tolerant inputs • Auto PD when input signal is at a certain logic state Switching Characteristics: • Period jitter: 40ps • Half-period ji. |
| Datasheet | ICS97U877 pdf datasheet |
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