DS90CF386 Datasheet

DS90CF386 +3.3V LVDS Receiver

The DS90CF386 receiver converts the four LVDS data streams (Up to 2.38 Gbps throughput or 297.5 Megabytes/ sec bandwidth) back into parallel 28 bits of CMOS/TTL data (24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL). Also available is the DS90CF366 that converts the three LVDS data streams (U.

Features

n 20 to 85 MHz shift clock support n Rx power consumption < 142 mW (typ) @85MHz Grayscale n Rx Power-down mode < 1.44 mW (max) n ESD rating > 7 kV (HBM), > 700V (EIAJ) n Supports VGA, SVGA, XGA and Single Pixel SXGA. n PLL requires no external components n Compatible with TIA/EIA-644 LVDS standard n Low profile 56-lead or 48-lead TSSOP package Block Diagrams DS90CF386 DS90CF366 DS101085-27 DS101085-28 Order Number DS90CF386MTD See NS Package Number MTD56 Order Number DS90CF366MTD See NS Package Number MTD48 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1.