Frequency Synthesizer. ACS1790T Datasheet

ACS1790T Synthesizer. Datasheet pdf. Equivalent

Part ACS1790T
Description PLL Frequency Synthesizer
Feature SCL SDA A0 FBCLK A1 VDDD2 ADVANCED COMMUNICATIONS PRODUCT GROUP Introduction The ACS1790T is a high.
Manufacture Semtech
Datasheet
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SCL SDA A0 FBCLK A1 VDDD2 ADVANCED COMMUNICATIONS PRODUCT G ACS1790T Datasheet
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ACS1790T
ADVANCED COMMUNICATIONS PRODUCT GROUP
Introduction
The ACS1790T is a high-performance, low phase noise,
programmable frequency synthesizer with ultra-fine
dynamic output frequency control. It can be used as a
companion to a compatible ToPSync™ device to
generate outputs locked to an external reference source
or standalone for standard frequency generation for
common applications. The circuit includes an integrated
VCO, loop filter, phase-and-frequency detector and
output dividers. The default power-up mode is definable
by pin settings and once operational the ACS1790T is
fully-programmable via an I2C interface. The ACS1790T
requires only a low-speed external clock input for
operation.
When used in conjunction with a compatible ToPSync®
device in a Synchronous Ethernet system the ACS1790T
allows the Ethernet transmit clocks to be derived initially
from the local reference oscillator and subsequently
frequency-locked to an external reference source once
the system is fully configured, simplifying system design
and reducing component count and BOM cost.
Pin Diagram
24 19
RESETB 1
OSCFSEL0
CLK
OSCFSEL1
VDDD
VSSD 6
ACS1790T
18 VDDA
OUT1P
OUT1N
VSSA
VSSD2
13 OUT2
7 12
ACS1790T
PLL Frequency Synthesizer with Integrated VCO
FINAL DATASHEET
Features
Optimised for Synchronous Ethernet, SONET and
SDH operation
Meets RMS jitter requirements of Gigabit
Ethernet, 10 Gigabit Ethernet and OC-48 / STM-
16
Default options for 25 MHz & 125 MHz or
25 MHz & 156.25 MHz outputs at reset
High frequency LVPECL output:
10 MHz 200 MHz, 1 ppb step
Low frequency LVCMOS output:
2 kHz 125 MHz
1.8V, 2.5V and 3.3V operation
Very-low frequency feedback clock output for
connection to ToPSync® or external PFD
Tunable over +/- 500 ppm range without loss of
lock
Integrated VCO, PFD and loop filter
2.3 2.7 GHz VCO frequency
Typical RMS jitter performance for target
application masks:
OC-48, STM-16 (ANSI T1.105.03 & ITU-T G.813)
0.56 ps (12 kHz 20 MHz)
1G Ethernet (IEEE 802.3-2008 38 & 39)
0.15 ps (637 kHz 20 MHz)
XAUI (IEEE 802.3-2008 Clause 47)
0.11 ps (1.875 MHz 20 MHz)
10G Ethernet (IEEE 802.3-2008 53 & 54)
0.29 ps (4 MHz 80 MHz)
Reference spurs: < -67 dBc
10, 12.8, 20 or 25 MHz input clock
Operating voltage: 3.0 - 3.6V
I2C -bus interface
Four selectable slave addresses to allow
multiple devices to be used with a single
controlling master
Lock detect output
Pin and register output enable control
Temperature range: -40 to 85C
4 x 4 mm QFN 24 package
Pb-Free, Halogen free, RoHS/WEEE compliant
product
Revision 1.0 May 2013 © Semtech Corp.
Page 1
www.semtech.com



ACS1790T
ACS1790T
ADVANCED COMMUNICATIONS PRODUCT GROUP
Table of Contents
FINAL DATASHEET
INTRODUCTION .................................................................................................................................................................................1
PIN DIAGRAM....................................................................................................................................................................................1
FEATURES .........................................................................................................................................................................................1
BLOCK DIAGRAM ..............................................................................................................................................................................5
PIN DESCRIPTION .............................................................................................................................................................................6
DEVICE OPERATION ..........................................................................................................................................................................7
THE VCO PLL BLOCK ................................................................................................................................................................................7
THE OUTPUT DIVIDER BLOCK........................................................................................................................................................................8
THE OUTPUT STAGE ....................................................................................................................................................................................8
THE CONTROL BLOCK .................................................................................................................................................................................8
Reset..................................................................................................................................................................................................9
USING THE ACS1790T ......................................................................................................................................................................9
HARDWARE DEVICE CONFIGURATION.............................................................................................................................................................9
Input clock frequency selection .......................................................................................................................................................9
Default output frequency selection............................................................................................................................................... 10
REGISTER-BASED DEVICE CONFIGURATION.................................................................................................................................................. 10
I2C slave address selection ........................................................................................................................................................... 10
I2C Write.......................................................................................................................................................................................... 11
I2C Read.......................................................................................................................................................................................... 11
Register map .................................................................................................................................................................................. 12
Register Descriptions..................................................................................................................................................................... 13
VCO CALIBRATION AND LOCK DETECTION ................................................................................................................................................... 18
FRACTIONAL DIVIDER DITHERING............................................................................................................................................................... 18
OUTPUT ENABLE CONTROL AND SQUELCHING .............................................................................................................................................. 19
OUT1 and OUT2.............................................................................................................................................................................. 19
FBCLK ............................................................................................................................................................................................. 19
OUT2 SLEW-RATE AND VOLTAGE CONTROL................................................................................................................................................. 20
ELECTRICAL SPECIFICATIONS........................................................................................................................................................ 21
MAXIMUM RATINGS ................................................................................................................................................................................ 21
OPERATING CONDITIONS ......................................................................................................................................................................... 21
DC CHARACTERISTICS............................................................................................................................................................................. 22
RF CHARACTERISTICS ............................................................................................................................................................................. 24
APPLICATIONS INFORMATION........................................................................................................................................................ 28
USING THE ACS1790T WITH TOPSYNC ................................................................................................................................................... 28
USING THE ACS1790T IN A STANDALONE APPLICATION .............................................................................................................................. 30
USING THE ACS1790T AS PART OF A PHASE-LOCKED LOOP......................................................................................................................... 30
CONFIGURATION FOR A PARTICULAR OUTPUT FREQUENCY.............................................................................................................................. 31
Programming for the OUT1 output................................................................................................................................................ 31
Programming for the OUT2 output................................................................................................................................................ 35
Programming to use both outputs ................................................................................................................................................ 37
Programming the feedback clock output ..................................................................................................................................... 38
Configuration for common output frequencies ............................................................................................................................ 39
Revision 1.0 May 2013 © Semtech Corp.
Page 2
www.semtech.com





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