CHMOS MICROCONTROLLER. 83C196KC Datasheet
87C196KC-16 Kbytes of On-Chip OTPROM
83C196KC-16 Kbytes ROM
Y 16 and 20 MHz Available
Y 488 Byte Register RAM
Y Register-to-Register Architecture
Y 28 Interrupt Sources/16 Vectors
Y Peripheral Transaction Server
Y 1.4 ms 16 x 16 Multiply (20 MHz)
Y 2.4 ms 32/16 Divide (20 MHz)
Y Powerdown and Idle Modes
Y Five 8-Bit I/O Ports
Y 16-Bit Watchdog Timer
Y Extended Temperature Available
Y Dynamically Configurable 8-Bit or
Y Full Duplex Serial Port
Y High Speed I/O Subsystem
Y 16-Bit Timer
Y 16-Bit Up/Down Counter with Capture
Y 3 Pulse-Width-Modulated Outputs
Y Four 16-Bit Software Timers
Y 8- or 10-Bit A/D Converter with
Y HOLD/HLDA Bus Protocol
Y OTPROM One-Time Programmable
The 80C196KC 16-bit microcontroller is a high performance member of the MCS 96 microcontroller family.
The 80C196KC is an enhanced 80C196KB device with 488 bytes RAM, 16 and 20 MHz operation and an
optional 16 Kbytes of ROM/OTPR OM. Intel's CHMOS III process provides a high performance processor
along with low power consumption.
The 87C196KC is an 80C196KC with 16 Kbytes on-chip OTPROM. The 83C196KC is an 80C196KC with 16
Kbytes factory programmed ROM. In this document, the 80C196KC will refer to all products unless otherwise
Four high-speed capture inputs are provided to record times when events occur. Six high-speed outputs are
available for pulse or waveform generation. The high-speed output can also generate four software timers or
start an A/D conversion. Events can be based on the timer or up/down counter.
With the commercial (standard) temperature option, operational characteristics are guaranteed over the tem-
perature range of 0 C to a70 C. With the extended (Express) temperature range option, operational charac-
teristics are guaranteed over the temperature range of b40 C to a85 C. Unless otherwise noted, the specifi-
cations are the same for both options.
See the Packaging information for extended temperature designators.
Other brands and names are the property of their respective owners.
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or
copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products. Intel retains the right to make
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
COPYRIGHT © INTELCORPORATION,2004
Figure 1. 8XC196KC Block Diagram
IOC3 (0CH HWIN1 READ/WRITE)
RSV-Reserved bits must be e 0
Figure 2. 8XC196KC New SFR Bit (CLKOUT Disable)