RQJ0305EQDQA

RQJ0305EQDQA Silicon P Channel MOS FET Power Switching Features Low gate drive VDSS : –30 V and 2.5 V gate drive Low drive current High speed switching Small traditional package (MPAK) Outline RENESAS Package code: PLSP0003ZB-A (Package name: MPAK) 3 1 2 Notes: Marking is "EQ". Preliminary Datasheet R07DS0297EJ0300 Rev.3.00 Jan 10, 2014 3 D 2 G S 1 1. Source 2. Gate 3. Drain Absolute Maximum Ratings Item Symbol Drain to source voltage Gate to source voltage Drain current Drain peak current Body - drain diode reverse drain current Channel dissipation VDSS VGSS ID ID(pulse) Note1 IDR Pch Note2 Channel temperature Tch Storage temperature Tstg Notes: 1. PW ≤ 10 μs, Duty cycle ≤ 1% 2. When using the glass epoxy board (FR-4 40 × 40 × 1 mm) Ratings –30 +8 / –12 –2.4 –10 2.4 0.8 150 –55 to +150 (Ta = 25°C) Unit V V A A A W °C °C R07DS0297EJ0300 Rev.3.00 Jan 10, 2014 Page 1 of 8 RQJ0305EQDQA Preliminary Electrical Characteristics Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Gate to source leak current Drain to source leak current Gate to source cutoff voltage Drain to source on state resistance Drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn - on delay time Rise time Turn - off delay time Fall time Total gate charge Gate to Source charge Gate to drain charge Body - drain diode forwar...