RQJ0306FQDQS

RQJ0306FQDQS Silicon P Channel MOS FET Power Switching Features Low gate drive VDSS : –30 V and 2.5 V gate drive Low drive current High speed switching Small traditional power package (UPAK) Outline RENESAS package code: PLZZ0004CA-A (Package name: UPAK R ) 1 2 3 4 1G Notes: Marking is "FQ". Absolute Maximum Ratings Item Symbol Drain to source voltage Gate to source voltage Drain current Drain peak current Body - drain diode reverse drain current Channel dissipation Thermal resistance VDSS VGSS ID ID(pulse) Note1 IDR Pch Note2 Rth(ch-a) Note2 Channel temperature Tch Storage temperature Tstg Notes: 1. PW ≤ 10 µs, Duty cycle ≤ 1% 2. When using the glass epoxy board (FR-4 40 × 40 × 1 mm) REJ03G1780-0100 Rev.1.00 Mar 16, 2009 2, 4 D 1. Gate 2. Drain 3. Source 4. Drain S 3 Ratings –30 +8 / –12 –4 –16 4 1.5 83 150 –55 to +150 (Ta = 25°C) Unit V V A A A W °C /W °C °C REJ03G1780-0100 Rev.1.00 Mar 16, 2009 Page 1 of 7 RQJ0306FQDQS Electrical Characteristics Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Gate to source leak current Drain to source leak current Gate to source cutoff voltage Drain to source on state resistance Drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn - on delay time Rise time Turn - off delay time Fall time Total gate charge Gate to Source charge Gate to drain charg...