RLDRAM 3. IS49RL18320 Datasheet

IS49RL18320 3. Datasheet pdf. Equivalent

IS49RL18320 Datasheet
Recommendation IS49RL18320 Datasheet
Part IS49RL18320
Description RLDRAM 3
Feature IS49RL18320; 576Mb: x18, x36 RLDRAM 3 Features RLDRAM 3 IS49RL18320 – 2 Meg x 18 x 16 Banks IS49RL36160 – 1 Meg .
Manufacture Integrated Silicon Solution
Datasheet
Download IS49RL18320 Datasheet




Integrated Silicon Solution IS49RL18320
576Mb: x18, x36 RLDRAM 3
Features
RLDRAM 3
IS49RL18320 – 2 Meg x 18 x 16 Banks
IS49RL36160 – 1 Meg x 36 x 16 Banks
Features
1066 MHz DDR operation (2133 Mb/s/ball data
rate)
76.8 Gb/s peak bandwidth (x36 at 1066 MHz clock
frequency)
Organization
– 32 Meg x 18, and 16 Meg x 36 common I/O (CIO)
– 16 banks
1.2V center-terminated push/pull I/O
2.5V VEXT, 1.35V VDD, 1.2V VDDQ I/O
Reduced cy cle time ( tRC (MIN) = 8 - 12ns)
SDR addressing
Programmable READ/WRITE latency (RL/WL) and
burst length
Data mask for WRITE commands
Differential input clocks (CK, CK#)
Free-running differential input data clocks (DKx,
DKx#) and output data clocks (QKx, QKx#)
On-die DLL generates CK edge-aligned data and
differential output data clock signals
64ms refresh (128K refresh per 64ms)
168-ball FBGA package
40Ω or 60 Ω matched impedance outputs
Integrated on-die termination (ODT)
Single or multibank writes
Extended operating range (200–1066 MHz)
READ training register
Multiplexed and non-multiplexed addressing capa-
bilities
Mirror function
Output driver and ODT calibration
JTAG interface (IEEE 1149.1-2001)
Options
Clock cycle and tRC timing
– 0.93ns and tRC (MIN) = 8ns
(RL3-2133)
– 0.93ns and tRC (MIN) = 10ns
(RL3-2133)
– 1.07ns and tRC (MIN) = 8ns
(RL3-1866)
– 1.07ns and tRC (MIN) = 10ns
(RL3-1866)
– 1.25ns and tRC (MIN) = 10ns
(RL3-1600)
– 1.25ns and tRC (MIN) = 12ns
(RL3-1600)
Configuration
– 32 Meg x 18
– 16 Meg x 36
Operating temperature
– Commercial (TC = 0° to +95°C)
– Industrial (TC = –40°C to +95°C)
Package
– 168-ball FBGA
– 168-ball FBGA (Pb-free)
Revision
Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this
specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any
information, products or services described herein. Customers are advised to obtain the latest version of this device specification
before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure
or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its
safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives
written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
01/17/2012
1



Integrated Silicon Solution IS49RL18320
Figure 1: 576Mb RLDRAM® 3 Part Numbers
Example Part Number: IS49RL18320-093EBL
-
IS49RL Configuration
Speed Package Temp
576Mb: x18, x36 RLDRAM3
Features
Configuration
32 Meg x 18 18320
16 Meg x 36 36160
Speed Grade
-093E tCK = 0.93ns (8nstRC)
-093 tCK = 0.93ns (10nstRC)
-107E tCK = 1.07ns (8nstRC)
-107 tCK = 1.07ns (10nstRC)
-125E tCK = 1.25ns (10nstRC)
-125 tCK = 1.25ns (12nstRC)
Temperature
Commercial
Industrial
None
I
Package
168-ball FBGA
168-ball FBGA (lead-free)
B
BL
BGA Part Marking Decoder
Due to space limitations, BGA-packaged components have an abbreviated part marking that is different from the
part number. ISSI’s BGA Part Marking Decoder is available on ISSI’s Web site at www.issi.com
Integrated Silicon Solution, Inc. — www.issi.com
01/17/2012
2



Integrated Silicon Solution IS49RL18320
576Mb: x18, x36 RLDRAM 3
Features
Contents
General Description ......................................................................................................................................... 8
General Notes .............................................................................................................................................. 8
State Diagram .................................................................................................................................................. 9
Functional Block Diagrams ............................................................................................................................. 10
Ball Assignments and Descriptions ................................................................................................................. 12
Package Dimensions ....................................................................................................................................... 16
Electrical Characteristics – IDD Specifications .................................................................................................. 17
Electrical Specifications – Absolute Ratings and I/O Capacitance ..................................................................... 21
Absolute Maximum Ratings ........................................................................................................................ 21
Input/Output Capacitance .......................................................................................................................... 21
AC and DC Operating Conditions .................................................................................................................... 22
AC Overshoot/Undershoot Specifications .................................................................................................... 24
Slew Rate Definitions for Single-Ended Input Signals ................................................................................... 27
Slew Rate Definitions for Differential Input Signals ...................................................................................... 29
ODT Characteristics ....................................................................................................................................... 30
ODT Resistors ............................................................................................................................................ 30
ODT Sensitivity .......................................................................................................................................... 32
Output Driver Impedance ............................................................................................................................... 33
Output Driver Sensitivity ............................................................................................................................ 35
Output Characteristics and Operating Conditions ............................................................................................ 36
Reference Output Load ............................................................................................................................... 39
Slew Rate Definitions for Single-Ended Output Signals ..................................................................................... 40
Slew Rate Definitions for Differential Output Signals ........................................................................................ 41
Speed Bin Tables ............................................................................................................................................ 42
AC Electrical Characteristics ........................................................................................................................... 43
Temperature and Thermal Impedance Characteristics ..................................................................................... 48
Command and Address Setup, Hold, and Derating ........................................................................................... 50
Data Setup, Hold, and Derating ....................................................................................................................... 56
Commands .................................................................................................................................................... 62
MODE REGISTER SET (MRS) Command ......................................................................................................... 63
Mode Register 0 (MR0) .................................................................................................................................... 64
tRC ............................................................................................................................................................. 65
Data Latency .............................................................................................................................................. 65
DLL Enable/Disable ................................................................................................................................... 65
Address Multiplexing .................................................................................................................................. 65
Mode Register 1 (MR1) .................................................................................................................................... 67
Output Drive Impedance ............................................................................................................................ 67
DQ On-Die Termination (ODT) ................................................................................................................... 67
DLL Reset ................................................................................................................................................... 67
ZQ Calibration ............................................................................................................................................ 68
ZQ Calibration Long ................................................................................................................................... 69
ZQ Calibration Short ................................................................................................................................... 69
AUTO REFRESH Protocol ............................................................................................................................ 70
Burst Length (BL) ....................................................................................................................................... 70
Mode Register 2 (MR2) .................................................................................................................................... 72
READ Training Register (RTR) ..................................................................................................................... 72
WRITE Protocol .......................................................................................................................................... 74
WRITE Command .......................................................................................................................................... 74
Multibank WRITE ....................................................................................................................................... 75
READ Command ............................................................................................................................................ 75
Integrated Silicon Solution, Inc. — www.issi.com
01/17/2012
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