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IS49RL18320

Integrated Silicon Solution

2 Meg x 18 x 16 Banks RLDRAM

RLDRAM 3 IS49RL18320– 2 Meg x 18 x 16 Banks IS49RL36160– 1 Meg x 36 x 16 Banks Features • 1066 MHz DDR operation (2133...


Integrated Silicon Solution

IS49RL18320

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Description
RLDRAM 3 IS49RL18320– 2 Meg x 18 x 16 Banks IS49RL36160– 1 Meg x 36 x 16 Banks Features 1066 MHz DDR operation (2133 Mb/s/ball data rate) 76.8 Gb/s peak bandwidth (x36 at 1066 MHz clock frequency) Organization – 32 Meg x 18, and 16 Meg x 36 common I/O (CIO) – 16 banks 1.2V center-terminated push/pull I/O 2.5V V EXT , 1.35V V DD , 1.2V V DDQ I/O Reduced cycle time (tRC (MIN) = 8 - 12ns) SDR addressing Programmable READ/WRITE latency (RL/WL) and burst length Data mask for WRITE commands Fr x, DK x#) and output data clocks (QK x, QK x#) On-die DLL generates CK edge-aligned data and 64ms refresh (128K refresh per 64ms) 168-ball FBGA package Ω or 60 Ω matched impedance outputs Integrated on-die termination (ODT) Single or multibank writes Extended operating range (200–1066 MHz) READ training register Multiplexed and non-multiplexed addressing capa- bilities Mirror function Output driver and ODT calibration JTAG interface (IEEE 1149.1-2001) 576Mb: x18, x36 RLDRAM 3 Features Options Clock cycle and tRC timing – 0.93ns and tRC (MIN) = 8ns (RL3-2133) – 0.93ns and tRC (MIN) = 10ns (RL3-2133) – 1.07ns and tRC (MIN) = 8ns (RL3-1866) – 1.07ns and tRC (MIN) = 10ns (RL3-1866) – 1.25ns and tRC (MIN) = 8ns (RL3-1600) – 1.25ns and tRC (MIN) = 10ns (RL3-1600) – 1.25ns and tRC (MIN) = 12ns (RL3-1600) Con guration -32 Meg x 18 - 16 Meg x 36 Operating Temperature – Commercial (TC = 0° to +95°C) – Industr...




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