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WM1811A Dataheets PDF



Part Number WM1811A
Manufacturers Wolfson Microelectronics
Logo Wolfson Microelectronics
Description Multi-Channel Audio Hub CODEC
Datasheet WM1811A DatasheetWM1811A Datasheet (PDF)

w WM1811A Multi-Channel Audio Hub CODEC for Smartphones DESCRIPTION FEATURES The WM1811A[1] is a highly integrated ultra-low power hi-fi CODEC designed for smartphones and other portable devices rich in multimedia features. An integrated stereo Class D speaker driver and Class W headphone driver minimize power consumption during audio playback. The device requires only two voltage supplies, with all other internal supply rails generated from integrated LDOs. Stereo full duplex asynchronous .

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w WM1811A Multi-Channel Audio Hub CODEC for Smartphones DESCRIPTION FEATURES The WM1811A[1] is a highly integrated ultra-low power hi-fi CODEC designed for smartphones and other portable devices rich in multimedia features. An integrated stereo Class D speaker driver and Class W headphone driver minimize power consumption during audio playback. The device requires only two voltage supplies, with all other internal supply rails generated from integrated LDOs. Stereo full duplex asynchronous sample rate conversion and multi-channel digital mixing combined with powerful analogue mixing allow the device to support a huge range of different architectures and use cases. A programmable parametric EQ provides speaker compensation in the digital playback paths. The dynamic range controller can be used in record or playback paths for maintaining a constant signal level, maximizing loudness and protecting speakers against overloading and clipping. A smart digital microphone interface provides power regulation, a low jitter clock output and decimation filters for up to two digital microphones. Microphone activity detection with interrupt is available.Low power jack detection is supported via a dedicated input pin. Impedance sensing and measurement is provided for external accessory / push-button detection. Fully differential internal architecture and on-chip RF noise filters ensure a very high degree of noise immunity. Active ground loop noise rejection and DC offset correction help prevent pop noise and suppress ground noise on the headphone outputs.  24-bit 2-channel hi-fi DAC and 2-channel hi-fi ADC  100dB SNR during DAC playback (‘A’ weighted)  Smart MIC interface - Power, clocking and data input for up to two digital MICs - High performance analogue MIC interface - MIC activity detect & interrupt allows processor to sleep - Low power jack detection support - Impedance sensing for accessory / push-button detection  2W stereo (2 x 2W) Class D speaker driver  Capless Class W headphone drivers - Integrated charge pump - 5.3mW total power for DAC playback to headphones  4 Line outputs (single-ended or differential)  BTL Earpiece driver  Digital audio interfaces for multi-processor architecture - Asynchronous stereo duplex sample rate conversion - Powerful mixing and digital loopback functions  ReTuneTM Mobile 5-band, 4-channel parametric EQ  Dynamic range controller  Dual FLL provides all necessary clocks - Self-clocking modes allow processor to sleep - All standard sample rates from 8kHz to 96kHz  Active noise reduction circuits - DC offset correction removes pops and clicks - Ground loop noise cancellation  Integrated LDO regulators  80-ball W-CSP package (4.158 x 3.876 x 0.607mm) APPLICATIONS  Smartphones and music phones  Portable navigation  Tablets, eBooks  Portable Media Players WOLFSON MICROELECTRONICS plc [1] This product is protected by Patents US 7,622,984, US 7,626,445, and GB 2,469,345 Production Data, August 2014, Rev 4.2 Copyright 2014 Wolfson Microelectronics plc WM1811A Production Data TABLE OF CONTENTS DESCRIPTION................................................................................................................ 1  FEATURES ..................................................................................................................... 1  APPLICATIONS.............................................................................................................. 1  TABLE OF CONTENTS.................................................................................................. 2  BLOCK DIAGRAM ......................................................................................................... 6  PIN CONFIGURATION ................................................................................................... 7  ORDERING INFORMATION........................................................................................... 7  PIN DESCRIPTION......................................................................................................... 8  ABSOLUTE MAXIMUM RATINGS ............................................................................... 11  RECOMMENDED OPERATING CONDITIONS............................................................ 12  ELECTRICAL CHARACTERISTICS ............................................................................ 13  INPUT SIGNAL LEVEL .............................................................................................................. 13  INPUT PIN RESISTANCE ......................................................................................................... 14  PROGRAMMABLE GAINS ........................................................................................................ 16  OUTPUT DRIVER CHARACTERISTICS .................................................................................. 17  ADC INPUT PATH PERFORMANCE ......................................................................


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