Audio DSP. WM0011 Datasheet

WM0011 DSP. Datasheet pdf. Equivalent

WM0011 Datasheet
Recommendation WM0011 Datasheet
Part WM0011
Description General Purpose Low-Power Audio DSP
Feature WM0011; w WM0011 General Purpose Low-Power Audio DSP DESCRIPTION WM0011 Audio DSP provides Wolfson HD aud.
Manufacture Wolfson Microelectronics
Datasheet
Download WM0011 Datasheet




Wolfson Microelectronics WM0011
w
WM0011
General Purpose Low-Power Audio DSP
DESCRIPTION
WM0011 Audio DSP provides Wolfson HD audio quality,
with a power-budget targeted at handheld battery-powered
audio devices.
WM0011 combines the advanced Tensilica HiFi EP™ audio
DSP with an I/O and peripheral set optimized for flexible
integration into smartphones, tablets and other portable
consumer electronics devices. WM0011 is ideal for
extremely power-efficient implementations of advanced
voice enhancement, telephony noise reduction, voice and
music CODECs and general audio enhancement.
A very wide range of audio CODECs, voice CODECs and
third-party algorithms from such companies as Waves
Audio, SRS Labs and Dolby are available, providing a rich
portfolio of audio-processing options that can be integrated
into a device with no additional software development.
WM0011 comes in a space-saving 3x3mm 49-ball W-CSP
package with 0.4mm pitch.
APPLICATIONS
Wireless audio devices – headsets, microphones,
speakerphones
Portable media devices
Automotive
General purpose digital signal processor for consumer
audio applications
Smartphones
FEATURES
260MHz Tensilica HiFi EP™ 24-bit audio digital signal
processor
- C-programmable with advanced debugging and
profiling tool set
- 256kB local RAM memory
- 36kB Instruction / Data cache memory
- 384kB general-purpose system RAM
- Flexible boot options with 32kB boot ROM
- 32 Channel DMA
- XTAL or CMOS clock input
- Low-power programmable PLL
Security
- Support for HW Authentication
- Random Number Generator (RNG) to assist security
algorithms
Peripherals
- SPI Master / Slave interface
- 3 x multi-channel AIF interfaces, including I2S and TDM
- UART
- I2C Master
- I2C Slave
- 3 x 32-bit general-purpose timer modules
- Watchdog timer
- On-chip JTAG debug unit and trace buffer
- GPIO
Software-defined standby modes for extended battery life
WOLFSON MICROELECTRONICS plc
Production Data, August 2013, Rev 4.1
Copyright 2013 Wolfson Microelectronics plc



Wolfson Microelectronics WM0011
WM0011
BLOCK DIAGRAM
Production Data
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PD, Rev 4.1, August 2013
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Wolfson Microelectronics WM0011
WM0011
Production Data
TABLE OF CONTENTS
DESCRIPTION................................................................................................................ 1 
APPLICATIONS ............................................................................................................. 1 
FEATURES..................................................................................................................... 1 
BLOCK DIAGRAM ......................................................................................................... 2 
TABLE OF CONTENTS.................................................................................................. 3 
PIN CONFIGURATION ................................................................................................... 9 
ORDERING INFORMATION......................................................................................... 10 
PIN DESCRIPTION....................................................................................................... 10 
ABSOLUTE MAXIMUM RATINGS ............................................................................... 13 
RECOMMENDED OPERATING CONDITIONS............................................................ 13 
THERMAL PERFORMANCE........................................................................................ 14 
ELECTRICAL CHARACTERISTICS ............................................................................ 15 
TYPICAL POWER CONSUMPTION............................................................................. 16 
SIGNAL TIMING REQUIREMENTS ............................................................................. 17 
SYSTEM CLOCK & PHASE LOCKED LOOP (PLL) ................................................................17 
AUDIO INTERFACE (AIF) TIMING ..........................................................................................18 
DIGITAL AUDIO INTERFACE – MASTER MODE.................................................................................................18 
DIGITAL AUDIO INTERFACE – SLAVE MODE ....................................................................................................19 
SPI INTERFACE TIMING.........................................................................................................20 
SPI INTERFACE – MASTER MODE .....................................................................................................................20 
SPI INTERFACE – SLAVE MODE ........................................................................................................................21 
CONTROL INTERFACE (I2C) TIMING ....................................................................................22 
DEVICE DESCRIPTION ............................................................................................... 23 
INTRODUCTION ...................................................................................................................... 23 
BLOCK DIAGRAM ...................................................................................................................23 
DESCRIPTION OF MODULES ................................................................................................24 
BOOT ROM ...........................................................................................................................................................24 
TIGHTLY-COUPLED MEMORY (TCM) RAM ........................................................................................................24 
MULTI-PURPOSE RAM ........................................................................................................................................24 
TENSILICA HIFI EPTM DSP CORE........................................................................................................................24 
TIMER MODULE ...................................................................................................................................................25 
WATCHDOG MODULE .........................................................................................................................................25 
GPIO MODULE .....................................................................................................................................................25 
IRQC MODULE .....................................................................................................................................................25 
I2C MASTER AND SLAVE MODULE.....................................................................................................................26 
PLL MODULE ........................................................................................................................................................26 
AUDIO INTERFACE (AIF) MODULES...................................................................................................................26 
SPI MODULE.........................................................................................................................................................26 
FUSE MODULE.....................................................................................................................................................27 
DMA MODULE ......................................................................................................................................................27 
TRAX TRACE BUFFER MODULE ........................................................................................................................27 
JTAG MODULE .....................................................................................................................................................28 
ON-CHIP DEBUG MODULE..................................................................................................................................28 
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