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SPI SRAM. VS23S010C-S Datasheet

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SPI SRAM. VS23S010C-S Datasheet
















VS23S010C-S SRAM. Datasheet pdf. Equivalent













Part

VS23S010C-S

Description

1 Megabit SPI SRAM



Feature


VS23S010C-S Datasheet PRELIMINARY VS23 S010C-S - 1 Megabit SPI SRAM with Dual- I/O and Quad-I/O Features • Flexible 1.5V - 3.6V operating voltage • 131, 072 x 8-bit SRAM organization • Seria l Peripheral Interface (SPI) mode 0 com patible – Byte, Page and Sequential m odes – Supports Single, Dual and Quad I/O read and write – Fast operation: the whole memory can be filled.
Manufacture

VLSI

Datasheet
Download VS23S010C-S Datasheet


VLSI VS23S010C-S

VS23S010C-S; in 262158 or read in 262159 cycles (Qua d-I/O SPI, Quad address mode) XCS SO/I O1 XWP/IO2 GND 1 2 3 4 8 VCC 7 XHOLD/ IO3 6 SCLK 5 SI/IO1 Figure 1: SOIC8 na rrow package, compatible with standard pin out (not to scale). Operating Modes – XHOLD and XWP pins • High oper ating frequencies – Up to 36 MHz for SPI • Active Low-power – Read curr ent 200 µA at 1 MHz (Single .


VLSI VS23S010C-S

I/O, SO=0, TA=+85◦C, VDD=3.3V) • Ind ustrial temperature range – -40◦C t o + 85◦C • Pb-Free and RoHS complia nt 1,048,576 bit (128K x 8) SRAM Array Description The VLSI Solution VS23S01 0C-S is an easyto-use and versatile ser ial SRAM device. The memory is accessed via an SPI compatible serial bus. Appl ications • Microcontroller RAM extens ion • VoIP and internet data str.


VLSI VS23S010C-S

eam buffer • Audio data buffer SPI Se rial Interface Figure 2: VS23S010C-S bl ocks In SPI mode SRAM and control regis ters can be accessed. Dual-I/O and Quad -I/O modes are used only for SRAM read and write. Following are connection exa mples for different operating modes. So me I/Os of VS23S010CS are unconnected, because they have internal pull-up or p ull-down resistors. .





Part

VS23S010C-S

Description

1 Megabit SPI SRAM



Feature


VS23S010C-S Datasheet PRELIMINARY VS23 S010C-S - 1 Megabit SPI SRAM with Dual- I/O and Quad-I/O Features • Flexible 1.5V - 3.6V operating voltage • 131, 072 x 8-bit SRAM organization • Seria l Peripheral Interface (SPI) mode 0 com patible – Byte, Page and Sequential m odes – Supports Single, Dual and Quad I/O read and write – Fast operation: the whole memory can be filled.
Manufacture

VLSI

Datasheet
Download VS23S010C-S Datasheet




 VS23S010C-S
VS23S010C-S Datasheet
VS23S010C-S - 1 Megabit SPI SRAM
with Dual-I/O and Quad-I/O
Features
Flexible 1.5V - 3.6V operating voltage
131,072 x 8-bit SRAM organization
Serial Peripheral Interface (SPI) mode
0 compatible
Byte, Page and Sequential modes
Supports Single, Dual and Quad
I/O read and write
Fast operation: the whole mem-
ory can be filled in 262158 or read
in 262159 cycles (Quad-I/O SPI,
Quad address mode)
XCS
SO/IO1
XWP/IO2
GND
1
2
3
4
8 VCC
7 XHOLD/IO3
6 SCLK
5 SI/IO1
Figure 1: SOIC8 narrow package, compatible
with standard pin out (not to scale).
Operating Modes
XHOLD and XWP pins
High operating frequencies
Up to 36 MHz for SPI
Active Low-power
Read current 200 µA at 1 MHz (Sin-
gle I/O, SO=0, TA=+85C, VDD=3.3V)
Industrial temperature range
-40C to + 85C
Pb-Free and RoHS compliant
1,048,576 bit
(128K x 8)
SRAM
Array
Description
The VLSI Solution VS23S010C-S is an easy-
to-use and versatile serial SRAM device. The
memory is accessed via an SPI compatible
serial bus.
Applications
Microcontroller RAM extension
VoIP and internet data stream buffer
Audio data buffer
SPI
Serial Interface
Figure 2: VS23S010C-S blocks
In SPI mode SRAM and control registers can
be accessed. Dual-I/O and Quad-I/O modes
are used only for SRAM read and write.
Following are connection examples for differ-
ent operating modes. Some I/Os of VS23S010C-
S are unconnected, because they have inter-
nal pull-up or pull-down resistors. Note also,
Version: 0.9 [Preliminary], 2015-01-16
1




 VS23S010C-S
VS23S010C-S Datasheet
that power and ground connections are not
shown in the following examples.
IO
IO
IO
IO
Micro−controller
control
clock
data
data
XCS
SCLK
SI/IO0
SO/IO1
XWP/IO2
XHOLD/IO3
VS23S010
SPI connection, minimum configuration
Micro−controller
IO
IO
IO
IO
IO
IO
control
clock
data
data
control
control
XCS
SCLK
SI/IO0
SO/IO1
XWP/IO2
XHOLD/IO3
VS23S010
SPI connection, basic configuration
Micro−controller
IO
IO
IO
IO
IO
IO
control
clock
data
data
control
control
XCS
SCLK
SI/IO0
SO/IO1
XWP/IO2
XHOLD/IO3
VS23S010
SPI Dual−I/O connection
Micro−controller
IO
IO
IO
IO
IO
IO
control
clock
data
data
data
data
XCS
SCLK
SI/IO0
SO/IO1
XWP/IO2
XHOLD/IO3
VS23S010
SPI Quad−I/O connection
Version: 0.9 [Preliminary], 2015-01-16
2




 VS23S010C-S
VS23S010C-S Datasheet
CONTENTS
Contents
VS23S010C-S
1
Table of Contents
3
List of Figures
4
1 Disclaimer
5
2 Definitions
5
3 Electrical Characteristics & Specifications
6
3.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.3.2 SPI Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.4 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4.1 SPI Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Packages and Pin Descriptions
12
4.1 Narrow SOIC8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 Connection Guidelines
13
6 Device Operation
14
6.1 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.1.1 Word, Page and Sequential Operation Modes . . . . . . . . . . . . . 15
6.1.2 Dual-I/O and Quad-I/O Operation . . . . . . . . . . . . . . . . . . . . 17
7 SPI Commands and Addressing
20
7.1 SPI Read Commands (03h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1.1 Dual-Output Read (3Bh and BBh) . . . . . . . . . . . . . . . . . . . . 21
7.1.2 Quad-Output Read (6Bh and EBh) . . . . . . . . . . . . . . . . . . . 22
7.2 SPI Write Commands (02h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2.1 Dual-Input Write (A2h and 22h) . . . . . . . . . . . . . . . . . . . . . 25
7.2.2 Quad-Input Write (32h and B2h) . . . . . . . . . . . . . . . . . . . . . 25
7.3 SPI Miscellaneous Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.3.1 Read Status Register (05h) . . . . . . . . . . . . . . . . . . . . . . . 27
7.3.2 Write Status Register (01h) . . . . . . . . . . . . . . . . . . . . . . . 27
7.3.3 Read Manufacturer and Device ID (9Fh) . . . . . . . . . . . . . . . . 29
8 Known Issues
30
8.1 Powering Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.2 Idle Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9 Document Version Changes
31
10 Contact Information
32
Version: 0.9 [Preliminary], 2015-01-16
3




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