MUN5311DW1T1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MUN5311DW1T1/D Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the MUN5311DW1T1 series, two complementary BRT devices are housed in the SOT–363 package which is ideal for low power surface mount applications where board space is at a premium. Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel. MUN5311DW1T1 SERIES Motorola Preferred Devices 65 4 123 CASE 419B–01, STYLE 1 SOT–363 (3) (2) (1) R1 Q1 R2 R1 (4) (5) R2 Q2 (6) MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2, – minus sign for Q2 (PNP) omitted) Rating Symbol Value Unit Collector-Base Voltage Collector-Emitter Voltage Collector Current THERMAL CHARACTERISTICS VCBO 50 Vdc VCEO 50 Vdc IC 100 mAdc Thermal Resistance — Junction-to-Ambient (surface mounted) RθJA Operating and Storage Temperature Range Total Package Dissipation @ TA = 25°C(1) TJ, Tstg PD DEVICE MARKING AND RESISTOR VALUES: MUN5311DW1T1 SERIES ...