IS61QDB22M18A IS61QDB21M36A
2Mx18, 1Mx36 36Mb QUAD (Burst 2) Synchronous SRAM
JANUARY 2015
FEATURES
1Mx36 and 2Mx18 configuration available. On-chip Delay-Locked Loop (DLL) for wide data
valid window. Separate independent read and write ports with
concurrent read and write operations. Synchronous pipeline read with EARLY write
operation. Double ...
