IS61QDB44M18A IS61QDB42M36A
4Mx18, 2Mx36 72Mb QUAD (Burst 4) SYNCHRONOUS SRAM
FEATURES
DESCRIPTION
AUGUST 2014
2Mx36 and 4Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Separate independent read and write ports with concurrent read and write operations.
Synchronous pipeline read with late write operation...
