P‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
‐20V
D
RDSON (MAX.)
...
P‐Channel Logic Level Enhancement Mode Field Effect
Transistor
Product Summary:
BVDSS
‐20V
D
RDSON (MAX.)
25mΩ
ID
‐7.8A
G
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Bottom View
S DD
SD
GD D
PIN 1
SYMBOL
EMF25P02VA
LIMITS
UNIT
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
VGS ID IDM PD Tj, Tstg
TYPICAL
±8 ‐7.8 ‐5.8 ‐31.2 2.08 1.33 ‐55 to 150
V A
W °C
MAXIMUM
UNIT
Junction‐to‐Case
RJC
Junction‐to‐Ambient3
RJA
1Pulse width limited by maximum junction temperature. 2Duty cycle 1% 360°C / W when mounted on a 1 in2 pad of 2 oz copper.
12 °C / W
60
2013/11/13
p.1
ELECTRICAL CHARACTERISTICS (TA = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
EMF25P02VA
LIMITS
UNIT
MIN TYP MAX
STATIC
Drain‐Source Breakdown Voltage Gate Threshold Voltage Gate‐Body Leakage Zero Gate Voltage Drain Current
On‐State Drain Current1 Drain‐Source On‐State Resistance1
Forward Transconductance1
V(BR)DSS VGS(th) IGSS IDSS
ID(ON) RDS(ON)
gfs
VGS = 0V, ID = ‐250A VDS = VGS, ID = ‐250A
VDS = 0V, VGS = ±8V VDS = ‐16V, VGS = 0V VDS = ‐16V, VGS = 0V, TJ = 125 °C VDS = ‐5V...