High-Performance EE CMOS Programmable Logic
1
FINAL
MACH 1 & 2 FAMILIES COM’L: -6/7/10/12/15 IND: -12/14/18
MACH231-6/7/10/12/15
High-Performance EE CMOS Programm...
Description
1
FINAL
MACH 1 & 2 FAMILIES COM’L: -6/7/10/12/15 IND: -12/14/18
MACH231-6/7/10/12/15
High-Performance EE CMOS Programmable Logic
MACH 1 & 2 Families
DISTINCTIVE CHARACTERISTICS
x 84 Pins in PLCC x 128 Macrocells x 6 ns tPD Commercial; 12 ns tPD Industrial x 133 MHz fCNT x 64 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs x 128 Flip-flops; 4 clock choices x 8 “PALCE32V16" blocks with buried macrocells x SpeedLocking™ for guaranteed fixed timing x Bus-Friendly™ Inputs and I/Os x Peripheral Component Interconnect (PCI) compliant (-6/-7/-10/-12) x Programmable power-down mode x Pin-compatible with the MACH131 and M4-128N
GENERAL DESCRIPTION
The MACH231 is a member of Vantis’ high-performance EE CMOS MACH® 1 & 2 device families. This device has approximately twelve times the logic macrocell capability of the popular PALCE22V10 without loss of speed.
The MACH231 consists of eight PAL® blocks interconnected by a programmable switch matrix. The switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks. This allows designs to be placed and routed efficiently.
The MACH231 has two kinds of macrocell: output and buried. The output macrocell provides registered, latched, or combinatorial outputs with programmable polarity. If a registered configuration is chosen, the register can be configured as D-type or T-type to help reduce the number of product terms. The register type decision can be...
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