CLC501

CLC501 High-Speed Output Clamping Op Amp June 1999 N CLC501 High-Speed Output Clamping Op Amp General Description Features s s s s s Output clamping (Vhigh and Vlow) 1ns recovery from clamping/overdrive 0.05% settling in 12ns Characterized and guaranteed at Av = +32 Low power, 180mW Residue amplifier in high-accuracy, subranging A/D systems High-speed communications Output clamping applications Pulse amplitude modulation systems Applications s s s s The CLC501 is available in several versions to meet a variety of requirements. A three-letter suffix determines the version: CLC501AJP -40°C to +85°C 8-pin plastic DIP CLC501AJE -40°C to +85°C 8-pin plastic SOIC DESC SMD number: 5962-89974 Non-Inverting Frequency Response Vout = 2Vpp Av = 16 Rf = 2.49kΩ Av = 8 Rf = 4.02kΩ Pinout DIP & SOIC Phase (deg) Magnitude (1dB/div) 0 -90 Av = 32 Rf = 1.5kΩ Av = 64 Rf = 604Ω -180 -270 -360 -450 100 1 10 © 1999 National Semiconductor Corporation Printed in the U.S.A. http://www.national.com CLC501 Electrical Characteristics (Av = +32,Vcc = ±5V, RL = 100Ω, Rf = 1.5Ω,VH = +3V; unless specified) Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Absolute Maximum Ratings Miscellaneous Ratings Package Thermal Resistance Package ESD rating (human body model) <1000V θJC 70°C/W 65°C/W 45°C/W θJA 125°C/W 145°C/W 135°C/W AJP AJE CERDIP http://www.national.c...