CLC502

CLC502 Clamping, Low-Gain Op Amp with Fast 14-bit Settling June 1999 N CLC502 Clamping, Low-Gain Op Amp with Fast 14-bit Settling General Description Features s s s s Output clamping with fast recovery 0.0025% settling in 25ns (32ns max.) Low power, 170mW Low distortion. -50dBc at 20MHz Output clamping applications High-accuracy A/D systems (12-14 bits) High-accuracy D/A converters Pulse amplitude modulation systems Applications s s s s The CLC502 is available in several versions to meet a variety of requirements. A three-letter suffix determines the version: CLC502AJP -40°C to +85°C CLC502AJE -40°C to +85°C DESC SMD number: 5962-91743 8-pin plastic DIP 8-pin plastic SOIC Package Dimensions Pinout DIP & SOIC © 1999 National Semiconductor Corporation Printed in the U.S.A. http://www.national.com CLC502 Electrical Characteristics (Av = +2,Vcc = ±5V, RL = 100Ω, Rf = 250Ω,VH = +3V, VL = -3V) Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Absolute Maximum Ratings Miscellaneous Ratings http://www.national.com 2 Typical Performance Characteristics (TA = 25°, Av = +2, VCC = ±5V, RL = 100Ω, Non-Inverting Frequency Response Vout = 0.5Vpp Av = 2 Rf = 249Ω Av = 1 Rf = 301Ω Rf = 250Ω, VH = +3V, VL = -3V ) Inverting Frequency Response Vout = 0.5Vpp Av = -2 Rf = 237Ω Av = -1 Rf = 249Ω Phase (deg) Magnitude (1dB/div) Magnitude (1dB/div) 0 -90 A...