CPC5710N

INTEGRATED CIRCUITS DIVISION CPC5710N Phone Line Monitor (PLM) IC Features Excellent common-mode rejection ratio (CMRR) Application circuits can meet isolation requirements of worldwide telephony standards Small 8-pin SOIC Worldwide telephone network compatibility Full-wave ringing level detector comparator with internal threshold, large hysteresis, and logic-level output 3.3V or 5V operation High differential input impedance Very low common-mode input impedance Fixed gain Differential or single-ended linear output TTL logic level input CMOS logic level output (TTL compatible) Virtually non-detectable in voice monitoring applications Applications The CPC5710N can be used for line monitoring or detection of signaling states and loop conditions such as: Display feature (caller ID) signal buffering Line-In-Use (LIU) detection Ringing signal with adjustable detection level Battery presence monitoring Tip to ring line voltage monitoring Line polarity Imperceptible voice recording CPC5710N Block Diagram 3 LIN/CMP VDD 50kΩ VDD 6 IN+ 7 IN- 1.625 V + - + Description The CPC5710N is a selectable dual function CMOS special purpose integrated high-impedance input, fixed-gain amplifier and an internally set voltage level comparator for telephone line monitoring. The high (>40dB) common-mode rejection ratio makes the CPC5710N an excellent choice for signaling detection, line condition monitoring, discrete voice recording and CID buffering...