IS61DDB44M18A IS61DDB42M36A
4Mx18, 2Mx36 72Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM
JANUARY 2015
FEATURES
2Mx36 and 4Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid
window. Common I/O read and write ports. Synchronous pipeline read with late write operation. Double Data Rate (DDR) interface for read and
write inp...
