DatasheetsPDF.com

IS61DDPB21M18A2

18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM

Description

IS61DDPB21M18A/A1/A2 IS61DDPB251236A/A1/A2 1Mx18, 512Kx36 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM (2.5 Cycle Read Latency) ADVANCED INFORMATION JULY 2012 FEATURES DESCRIPTION  512Kx36 and 1Mx18 configuration available.  On-chip Delay-Locked Loop (DLL) for wide data valid window.  Common I/O read and write ports.  Synchronous pipeline read with sel...

Integrated Silicon Solution

Download IS61DDPB21M18A2 Datasheet

Similar Datasheet

IS61DDPB21M18A 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM - Integrated Silicon Solution
IS61DDPB21M18A1 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM - Integrated Silicon Solution
IS61DDPB21M18A2 18Mb DDR-IIP(Burst 2) CIO SYNCHRONOUS SRAM - Integrated Silicon Solution

@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)