Document
TC4021BP/BF/BFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC4021BP,TC4021BF,TC4021BFN
TC4021B 8-Stage Static Shift Register
(asynchronous parallel input or synchronous serial input/serial output)
TC4021B is 8 stage parallel in/serial out shift register, which can be used also for serial in/serial out operations. In the case of parallel operation, the data of PARALLEL IN is input to each F/F asynchronously with CLOCK and the output is obtained. In the case of serial operations, each F/F is triggered by rising edge of CLOCK. (asynchronous parallel or synchronous serial input)
Switching of PARALLEL operation and SERIAL operation is achieved by P/ S CONTROL input. When P/ S CONTROL input is “H”, PARALLEL operation is designated and when it is “L”, SERIAL operation is designated.
Pin Assignment
Note: xxxFN (JEDEC SOP) is not available in Japan.
TC4021BP
TC4021BF
Truth Table
Inputs
Outputs∆
CLOCK∆∆ P/S PI1 Pln SI Q1
Qn
L * * L L Qn − 1
L * * H H Qn − 1
L***
No Change
*
HL L * L
L
*
HLH* L
H
*
HHL * H
L
*
HHH * H
H
n: 2~8 ∆: Q1~Q5 internal ∆∆: Level change *: Don’t care
1
TC4021BFN
Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOP16-P-300-1.27 SOL16-P-150-1.27
: 1.00 g (typ.) : 0.18 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.)
2006-02-01
Logic Diagram Parallel
TC4021BP/BF/BFN
Internal Flip Flop 2 2006-02-01
Absolute Maximum Ratings (Note)
TC4021BP/BF/BFN
Characteristics
Symbol
Rating
Unit
DC supply voltage Input voltage Output voltage DC input current Power dissipation Operating temperature range Storage temperature range
VDD VIN VOUT IIN PD Topr Tstg
VSS − 0.5~VSS + 20 VSS − 0.5~VDD + 0.5 VSS − 0.5~VDD + 0.5
±10 300 (DIP)/180 (SOIC)
−40~85 −65~150
V V V mA mW °C °C
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.
Recommended Operating Conditions (VSS = 0 V) (Note)
Characteristics
Symbol
Test Condition
Min Typ. Max
DC supply voltage Input voltage
VDD VIN
⎯ 3 ⎯ 18 ⎯ 0 ⎯ VDD
Note: The recommended operating conditions are required to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND.
Unit
V V
3 2006-02-01
TC4021BP/BF/BFN
Static Electrical Characteristics (VSS = 0 V)
Characteristics
High-level output voltage
Symbol
Test Condition
−40°C
25°C
85°C
VDD (V)
Min
Max
Min
Typ.
Max
Min
Max
⎪IOUT⎪ < 1 µA VOH
VIN = VSS, VDD
5 4.95 ⎯ 4.95 5.00 ⎯ 4.95 ⎯ 10 9.95 ⎯ 9.95 10.00 ⎯ 9.95 ⎯ 15 14.95 ⎯ 14.95 15.00 ⎯ 14.95 ⎯
Low-level output voltage
⎪IOUT⎪ < 1 µA VOL VIN = VSS, VDD
5 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05 10 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05 15 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05
Output high current
Output low current
Input high voltage
Input low voltage
Input current
“H” level “L” level
Quiescent supply current
VOH = 4.6 V
5
VOH = 2.5 V
5
IOH VOH = 9.5 V
10
VOH = 13.5 V
15
VIN = VSS, VDD
VOL = 0.4 V
5
VOL = 0.5 V IOL
VOL = 1.5 V
10 15
VIN = VSS, VDD
VOUT = 0.5 V, 4.5 V 5
VOUT = 1.0 V, 9.0 V 10 VIH
VOUT = 1.5 V, 13.5 V 15
⎪IOUT⎪ < 1 µA
VOUT = 0.5 V, 4.5 V 5
VOUT = 1.0 V, 9.0 V 10 VIL
VOUT = 1.5 V, 13.5 V 15
⎪IOUT⎪ < 1 µA
IIH VIH = 18 V
18
IIL VIL = 0 V
18
5 VIN = VSS, VDD IDD 10
(Note) 15
−0.61 −2.50 −1.50 −4.00
0.61 1.50 4.00
3.5 7.0 11.0
⎯ ⎯ ⎯
⎯ ⎯ ⎯ ⎯ ⎯
⎯ ⎯ ⎯ ⎯
⎯ ⎯ ⎯
⎯ ⎯ ⎯
1.5 3.0 4.0
0.1 −0.1
5 10 20
−0.51 −2.10 −1.30 −3.40
−1.0 −4.0 −2.2 −9.0
0.51 1.30 3.40
1.5 3.8 15.0
3.5 7.0 11.0
2.75 5.50 8.25
⎯ 2.25 ⎯ 4.50 ⎯ 6.75
⎯ 10−5 ⎯ −10−5 ⎯ 0.005 ⎯ 0.010 ⎯ 0.020
⎯ ⎯ ⎯ ⎯
⎯ ⎯ ⎯
⎯ ⎯ ⎯
1.5 3.0 4.0
0.1 −0.1
5 10 20
−0.42 −1.70 −1.10 −2.80
0.42 1.10 2.80
3.5 7.0 11.0
⎯ ⎯ ⎯
⎯ ⎯ ⎯ ⎯ ⎯
⎯ ⎯ ⎯ ⎯
⎯ ⎯ ⎯
⎯ ⎯ ⎯
1.5 3.0 4.0
1.0 −1.0 150 300 600
Unit V V mA
mA V V µA µA
Note: All valid input combinations.
4 2006-02-01
TC4021BP/BF/BFN
Dynamic Electrical Characteristics (Ta = 25°C, VSS = 0 V, CL = 50 pF)
Characteristics
Output transition time (low to high)
Output transition time (high to low)
Propagation delay time (CLOCK-Q)
Propagation delay time ( P/S -Q)
Max clock frequency
Min clock pulse width
Max clock rise time Max clock fall time
Min set-up time (SI-CLOCK)
Min set-up time (PI- P/S )
Min hold time (SI-CLOCK), (PI- P/S )
Min pulse width ( P/S -CONTROL)
Min removal time ( P/S -CLOCK) Input capacitance
Symbol tTLH
tTHL tpLH tpHL tpLH tpHL fCL
tW trCL tfCL tSU
tSU
tH
tWH
trem CIN
Test Condition
Min Typ. Max Unit
VDD (V)
5 ⎯ 80 200
⎯ 10 ⎯ 50 100 ns
15 ⎯ 40 80
5 ⎯ 80 200
⎯ 10 ⎯ 50 100 ns
15 ⎯ 40 80
5 ⎯ 150 320
⎯ 10 ⎯ 65 160 ns
15 ⎯ 45 120
5 ⎯ 230 460
⎯ 10 ⎯ 90 180 ns
15 ⎯ 60 120
5
3.0 6.5
⎯
⎯ 10 6.0 18.0 ⎯ MHz
15 8.5 24.0 ⎯
5 ⎯ 80 180
⎯ 10 ⎯ 30 80 ns
15 ⎯ 20 50
5
20.0 ⎯
⎯
⎯ 10 2.5 ⎯ ⎯ µs
15
1.0 ⎯
⎯
5 ⎯ 40 120
⎯ 10 ⎯ 20 80 ns
15 ⎯ 15 60
5 ⎯ 25 50
⎯ 10 ⎯ 15 30 ns
15 ⎯ 10 20
5 ⎯ 35 70
⎯ 10 ⎯ 20 40 ns
15 ⎯ 15 30
5 ⎯ 90 180
⎯ 10 ⎯ 30 80 ns
15 ⎯ 10 50
5 ⎯ 45 280
⎯ 10 ⎯ 20 140 ns
15 ⎯ 15 100
⎯ ⎯ 5 7.5 pF
5 2006-02-01
Waveforms for Measurement of Dynamic Characteristics Waveform 1
.