512Mb Mobile Synchronous DRAM
IS42SM32160C IS42RM32160C
16Mx32 512Mb Mobile Synchronous DRAM
NOVEMBER 2010
FEATURES: • Fully synchronous; all sign...
Description
IS42SM32160C IS42RM32160C
16Mx32 512Mb Mobile Synchronous DRAM
NOVEMBER 2010
FEATURES: Fully synchronous; all signals referenced to a
positive clock edge Internal bank for hiding row access and pre-
charge Programmable CAS latency: 2, 3 Programmable Burst Length: 1, 2, 4, 8, and Full
Page Programmable Burst Sequence: Sequential and Interleave Auto Refresh (CBR) TCSR (Temperature Compensated Self Refresh) PASR (Partial Arrays Self Refresh): 1/16, 1/8,
1/4, 1/2, and Full Deep Power Down Mode (DPD) Driver Strength Control (DS): 1/4, 1/2, and Full
OPTIONS: Configuration: 16Mx32 Power Supply:
IS42SMxxx - Vdd/Vddq = 3.3V IS42RMxxx - Vdd/Vddq = 2.5V Package: 90 Ball BGA (8x13mm) Temperature Range: Commercial (0oC to +70oC) Industrial (-40oC to +85oC) Die revision: C
DESCRIPTION:
ISSI's IS42SM/RM32160C is a 512Mb Mobile Synchronous DRAM configured as a quad 4M x32 DRAM. It achieves high-speed data transfer using a pipeline architecture with a synchronous interface. All inputs and outputs signals are registered on the rising edge of the clock input, CLK. The 512Mb SDRAM is internally configured by stacking two 256Mb, 16Mx16 devices. Each of the 4M x32 banks is organized as 8192 rows by 512 columns by 32 bits.
KEY TIMING PARAMETERS
Parameter
-7 -75
CLK Cycle Time
CAS Latency = 3
7 7.5
CAS Latency = 2
9.6 9.6
CLK Frequency
CAS Latency = 3
143 133
CAS Latency = 2
104 104
Access Time from CLK
CAS Latency = 3
5.4 5.4
C...
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