54F676

54F 74F676 16-Bit Serial Parallel-In Serial-Out Shift Register Obsolete December 1994 54F 74F676 16-Bit Serial Parallel-In Serial-Out Shift Register General Description The ’F676 contains 16 flip-flops with provision for synchronous parallel or serial entry and serial output When the Mode (M) input is HIGH information present on the parallel data (P0 – P15) inputs is entered on the falling edge of the Clock Pulse (CP) input signal When M is LOW data is shifted out of the most significant bit position while information present on the Serial (SI) input shifts into the least significant bit position A HIGH signal on the Chip Select (CS) input prevents both parallel and serial operations Features Y 16-bit parallel-to-serial conversion Y 16-bit serial-in serial-out Y Chip select control Y Slim 24 lead 300 mil package Commercial 74F676PC 74F676SPC 74F676SC (Note 1) Military 54F676DM (Note 2) 54F676SDM (Note 2) 54F676FM (Note 2) 54F676LM (Note 2) Package Number N24A N24C J24A J24F M24B W24C E28A Package Description 24-Lead (0 600 Wide) Molded Dual-In-Line 24-Lead (0 300 Wide) Molded Dual-In-Line 24-Lead (0 600 Wide) Ceramic Dual-In-Line 24-Lead (0 300 Wide) Ceramic Dual-In-Line 24-Lead (0 300 Wide) Molded Small Outline JEDEC 24-Lead Cerpack 24-Lead Ceramic Leadless Chip Carrier Type C Note 1 Devices also available in 13 reel Use suffix e SCX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Connection Diagrams Pin Assi...