54F20

54F 74F20 Dual 4-Input NAND Gate 54F 74F20 Dual 4-Input NAND Gate General Description This device contains two independent gates each of which performs the logic NAND function November 1994 Commercial 74F20PC 74F20SC (Note 1) 74F20SJ (Note 1) Military 54F20DM (Note 2) 54F20FM (Note 2) 54F20LM (Note 2) Package Number N14A J14A M14A M14D W14B E20A Package Description 14-Lead (0 300 Wide) Molded Dual-In-Line 14-Lead Ceramic Dual-In-Line 14-Lead (0 150 Wide) Molded Small Outline JEDEC 14-Lead (0 300 Wide) Molded Small Outline EIAJ 14-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbol Connection Diagrams IEEE IEC Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC Obsolete TL F 9462 – 2 TL F 9462–3 Unit Loading Fan Out Pin Names An Bn Cn Dn On Description Inputs Outputs 54F 74F UL HIGH LOW 10 10 50 33 3 Input IIH IIL Output IOH IOL 20 mA b0 6 mA b1 mA 20 mA TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9462 TL F 9462 – 1 RRD-B30M75 Printed in U S A Obsolete Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature b65 C to a150 C Amb...