Document
54F 74F398 54F 74F399 Quad 2-Port Register
www.DataSheet4U.com
May 1995
54F 74F398 54F 74F399
Quad 2-Port Register
General Description
The ’F398 and ’F399 are the logical equivalents of a quad 2-input multiplexer feeding into four edge-triggered flipflops A common Select input determines which of the two 4-bit words is accepted The selected data enters the flipflops on the rising edge of the clock The ’F399 is the 16-pin version of the ’F398 with only the Q outputs of the flip-flops available
Features
Y Select inputs from two data sources Y Fully positive edge-triggered operation Y Both true and complement outputs ’F398 Y Guaranteed 4000V minimum ESD protection
’F399
Commercial 74F398PC 74F398SC (Note 1)
74F399PC 74F399SC (Note 1) 74F399SJ (Note 1)
Military
54F398DM (Note 2) 54F398FM (Note 2) 54F398LM (Note 2) 54F399DM (Note 2)
54F399FM (Note 2) 54F399LM (Note 2)
Package Number N20A J20A M20B W20A E20A N20A J20A M20B M20D W20A E20A
Package Description
20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead (0 300 Wide) Molded Small Outline EIAJ 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Connection Diagrams
Pin Assignment for LCC
’F398
Pin Assignment for DIP SOIC and Flatpak
TL F 9533 – 5
TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9533
TL F 9533 – 6 RRD-B30M75 Printed in U S A
Connection Diagrams (Continued)
’F399
Logic Symbols
’F398
TL F 9533–7
IEEE IEC ’F398
TL F 9533 – 8
’F399
TL F 9533–2
TL F 9533–4
’F399
TL F 9533 – 1
Unit Loading Fan Out
Pin Names
Description
S
CP
I0a – I0d I1a – I1d Qa – Qd Qa – Qd
Common Select Input Clock Pulse Input (Active Rising Edge) Data Inputs from Source 0 Data Inputs from Source 1 Register True Outputs Register Complementary Outputs (’F398)
54F 74F
UL HIGH LOW
10 10 10 10 10 10 10 10 50 33 3 50 33 3
Input IIH IIL Output IOH IOL
20 mA b0 6 mA 20 mA b0 6 mA 20 mA b0 6 mA 20 mA b0 6 mA b1 mA 20 mA b1 mA 20 mA
2
TL F 9533 – 3
Functional Description
The ’F398 and ’F399 are high-speed quad 2-port registers They select four bits of data from either of two sources (Ports) under control of a common Select input (S) The selected data is transferred to a 4-bit output register synchronous with the LOW-to-HIGH transition of the Clock input (CP) The 4-bit D-type output register is fully edge-triggered The Data inputs (I0x I1x) and Select input (S) must be stable only a setup time prior to and hold time after the LOW-to-HIGH transition of the Clock input for predictable operation The ’F398 has both Q and Q outputs
Logic Diagram
Function Table
Inputs
Outputs
S I0 I1 Q Q
I I XL H
I hXH L
hX I L H
hX hH
L
H e HIGH Voltage Level L e LOW Voltage Level h e HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock transition I e LOW Voltage Level one setup time prior to the LOW-to-HIGH clock transition X e Immaterial
’F398 only
TL F 9533 – 9 ’F398 Only Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
3
Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications
Storage Temperature
b65 C to a150 C
Ambient Temperature under Bias
b55 C to a125 C
Junction Temperature under Bias Plastic
b55 C to a175 C b55 C to a150 C
VCC Pin Potential to Ground Pin
b0 5V to a7 0V
Input Voltage (Note 2)
b0 5V to a7 0V
Input Current (Note 2)
b30 mA to a5 0 mA
Voltage Applied to Output
in HIGH State (with VCC e 0V) Standard Output
TRI-STATE Output
b0 5V to VCC b0 5V to a5 5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min) ’F399
4000V
Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied
Note 2 Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating
Conditions
Free Air Ambient Temperature Military Commercial
b55 C to a125 C 0 C to a70 C
Supply Voltage Military Commercial
a4 5V to a5 5V a4 5V to a5 5V
DC Electrical Characteristics
Symbol
Parameter
54F 74F Min Typ Max
Units VCC
Conditions
VIH VIL VCD VOH
VOL
IIH
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage Input HIGH Current
54F 10% VCC 74F 10% VCC 74F 5% VCC
54F 10% VCC 74F 10% VCC
54F 74.