CDP1824

CDP1824, CDP1824C March 1997 32-Word x 8-Bit Static RAM Description The CDP1824 and CDP1824C are 32-word x 8-bit fully static CMOS random-access memories for use in CDP-1800 series microprocessor systems. These parts are compatible with the CDP1802 microprocessor and will interface directly without additional components. The CDP1824 is fully decoded and does not require a precharge or clocking signal for proper operation. It has common input and output and is operated from a single voltage supply. The MRD signal (output disable control) enables the three-state output drivers, and overrides the MWR signal. A CS input is provided for memory expansion. The CDP1824C is functionally identical to the CDP1824. The CDP1824 has an operating range of 4V to 10.5V, and the CDP1824C has an operating voltage range of 4V to 6.5V. The CDP1824 and CDP1824C are supplied in 18 lead hermetic dual-in-line ceramic packages (D suffix), and in 18 lead dual-in-line plastic packages (E suffix). Features Fast Access Time - VDD = 5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 710ns - VDD = 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320ns No Precharge or Clock Required Ordering Information 5V CDP1824CE CDP1824CEX CDP1824CD CDP1824E CDP1824EX CDP1824D 10V PDIP Burn-In SBDIP -40oC to +85oC PACKAGE TEMPERATURE RANGE -40oC to +85oC PKG. NO. E18.3 E18.3 D18.3 Pinout CDP1824, CDP1824C (PDIP, SBDIP) TOP VIEW FUNCTION MA4 MA3 MA2 MA1 MA0 BUS 7 BUS 6 BUS 5 VSS 1 2 3 4 ...