P60N03LDG

NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P60N03LDG TO-252 (DPAK) Lead-Free PRODUCT SUMMARY V(BR)DSS RDS(ON) 25 12.8m ID 60A D G 1. GATE 2. DRAIN 3. SOURCE S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate-Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.1mH L = 0.05mH Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range Lead Temperature (1/16” from case for 10 sec.) VGS ID IDM IAR EAS EAR PD Tj, Tstg TL THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction-to-Case RθJC Junction-to-Ambient RθJA Case-to-Heatsink RθCS 1Pulse width limited by maximum junction temperature. 2Duty cycle ≤ 1 TYPICAL 0.7 LIMITS ±20 60 36 140 20 140 5.6 60 38 -55 to 150 275 UNITS V A mJ W °C MAXIMUM 3 70 UNITS °C / W ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) STATIC VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, VGS = ±20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 °C VDS = 10V, VGS = 10V LIMITS UNIT MIN TYP MAX 25 0.8 1.2 2.5 V ±250 nA 25 µA 250 60 A 1 Sep-02-2004 NIKO-SEM N-Channel Logic Lev...