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CGS74B2525

National Semiconductor

1-to-8 Minimum Skew Clock Driver

CGS74B2525 1-to-8 Minimum Skew Clock Driver September 1995 CGS74B2525 1-to-8 Minimum Skew Clock Driver General Descrip...


National Semiconductor

CGS74B2525

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Description
CGS74B2525 1-to-8 Minimum Skew Clock Driver September 1995 CGS74B2525 1-to-8 Minimum Skew Clock Driver General Description This minimum skew clock driver is designed for Clock Generation and Support (CGS) applications operating well above 20 MHz (33 MHz 50 MHz) The device guarantees minimum output skew across the outputs of a given device and also from device-to-device Skew parameters are also provided as a means to measure duty cycle requirements as those found in high speed clocking systems The ’B2525 is a minimum skew clock driver with one input driving eight outputs specifically designed for signal generation and clock distribution applications Features Y Y Y Y Y Y Y Y Y Y Clock Generation and Support (CGS) Device Ideal for high frequency signal generation or clock distribution applications CGS74B version features National’s Advanced Bipolar FAST LSI process 1-to-8 low skew clock distribution 600 ps pin-to-pin output skew Specifications for device-to-device variation of propagation delay Specification for transition skew to meet duty cycle requirements Center pin VCC and GND configuration to minimize high speed switching noise Current sourcing 48 mA and current sinking of 64 mA Low dynamic power consumption above 20 MHz Guaranteed 4 kV ESD protection Logic Symbol Connection Diagram Pin Assignment for DIP and SOIC TL F 10907 – 1 TL F 10907 – 2 FAST and TRI-STATE are registered trademarks of National Semiconductor Corporation C1995 National Semiconductor Corpor...




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