Document
74HCU04-Q100
Hex unbuffered inverter
Rev. 2 — 22 October 2015
Product data sheet
1. General description
The 74HCU04-Q100 is a hex unbuffered inverter. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C
Complies with JEDEC standard JESD7A Balanced propagation delays ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name
Description
74HCU04D-Q100 40 C to +125 C SO14
plastic small outline package; 14 leads; body width 3.9 mm
74HCU04PW-Q100 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm
74HCU04BQ-Q100 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 3 0.85 mm
Version SOT108-1 SOT402-1 SOT762-1
NXP Semiconductors
4. Functional diagram
74HCU04-Q100
Hex unbuffered inverter
1 1A 3 2A 5 3A 9 4A 11 5A 13 6A
1Y 2 2Y 4 3Y 6 4Y 8 5Y 10 6Y 12
mna342
Fig 1. Logic symbol
1 12
1 34
1 56
1 98
1 11 10
1 13 12
mna343
Fig 2. IEC logic symbol
5. Pinning information
AY mna045
Fig 3. Logic diagram (one inverter)
+&84
$ < $ < $ < *1'
9&& $ < $ < $ <
DDD
Fig 4. Pin configuration SO14 and TSSOP14
+&84
$ 9&&
WHUPLQDO LQGH[DUHD
< $ < $ <
9&&
$ < $ < $
*1' <
DDD
7UDQVSDUHQWWRSYLHZ
(1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC.
Fig 5. Pin configuration DHVQFN14
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 16
NXP Semiconductors
74HCU04-Q100
Hex unbuffered inverter
5.1 Pin description
Table 2. Symbol 1A 1Y 2A 2Y 3A 3Y GND 4Y 4A 5Y 5A 6Y 6A VCC
Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Description data input data output data input data output data input data output ground (0 V) data output data input data output data input data output data input supply voltage
6. Functional description
Table 3. Function table H = HIGH voltage level; L = LOW voltage level Input nA L H
7. Limiting values
Output nY H L
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VCC IIK IOK IO ICC IGND Tstg Ptot
supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
SO14, TSSOP14 and DHVQFN14 packages
VI < 0.5 V or VI > VCC + 0.5 V VO < 0.5 V or VO > VCC + 0.5 V 0.5 V < VO < VCC + 0.5 V
Min 0.5 [1] [1] 50 65
[2]
-
Max +7.0 20 50 25 50 +150
500
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Unit V mA mA mA mA mA C
mW
74HCU04_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 22 October 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 16
NXP Semiconductors
74HCU04-Q100
Hex unbuffered inverter
[2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VCC VI VO Tamb
supply voltage input voltage output voltage ambient temperature
9. Static characteristics
Min Typ Max Unit
2.0 5.0 6.0 V
0-
VCC
V
0-
VCC
V
40
+25
+125
C
Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
VIH HIGH-level VCC = 2.0 V input voltage VCC = 4.5 V
1.7 1.4 3.6 2.6 -
1.7 3.6 -
1.7 3.6 -
V V
VCC = 5.5 V
4.8 3.4 -
4.8 -
4.8 -
V
VIL
LOW-level
VCC = 2.0 V
input voltage VCC = 4.5 V
- 0.6 0.3 - 1.9 0.9 -
0.3 0.9 -
0.3 V 0.9 V
VCC = 5.5 V
- 2.6 1.2 -
1.2 -
1.2 V
VOH
HIGH-level VI = VIH or VIL
output voltage IO = 20 A; VCC = 2.0 V 1..