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UJA1078ATW Dataheets PDF



Part Number UJA1078ATW
Manufacturers NXP
Logo NXP
Description High-speed CAN/dual LIN core system basis chip
Datasheet UJA1078ATW DatasheetUJA1078ATW Datasheet (PDF)

UJA1078A High-speed CAN/dual LIN core system basis chip Rev. 2 — 28 January 2011 Product data sheet 1. General description The UJA1078A core System Basis Chip (SBC) replaces the basic discrete components commonly found in Electronic Control Units (ECU) with a high-speed Controller Area Network (CAN) and two Local Interconnect Network (LIN) interfaces. The UJA1078A supports the networking applications used to control power and sensor peripherals by using a high-speed CAN as the main network i.

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UJA1078A High-speed CAN/dual LIN core system basis chip Rev. 2 — 28 January 2011 Product data sheet 1. General description The UJA1078A core System Basis Chip (SBC) replaces the basic discrete components commonly found in Electronic Control Units (ECU) with a high-speed Controller Area Network (CAN) and two Local Interconnect Network (LIN) interfaces. The UJA1078A supports the networking applications used to control power and sensor peripherals by using a high-speed CAN as the main network interface and the LIN interfaces as local sub-busses. The core SBC contains the following integrated devices: • High-speed CAN transceiver, inter-operable and downward compatible with CAN transceiver TJA1042, and compatible with the ISO 11898-2 and ISO 11898-5 standards • LIN transceivers compliant with LIN 2.1, LIN 2.0 and SAE J2602, and compatible with LIN 1.3 • Advanced independent watchdog (UJA1078A/xx/WD versions) • 250 mA voltage regulator for supplying a microcontroller; extendable with external PNP transistor for increased current capability and dissipation distribution • Separate voltage regulator for supplying the on-board CAN transceiver • Serial Peripheral Interface (SPI) (full duplex) • 2 local wake-up input ports • Limp home output port In addition to the advantages gained from integrating these common ECU functions in a single package, the core SBC offers an intelligent combination of system-specific functions such as: • Advanced low-power concept • Safe and controlled system start-up behavior • Detailed status reporting on system and sub-system levels The UJA1078A is designed to be used in combination with a microcontroller that incorporates a CAN controller. The SBC ensures that the microcontroller always starts up in a controlled manner. NXP Semiconductors UJA1078A High-speed CAN/dual LIN core system basis chip 2. Features and benefits 2.1 General „ Contains a full set of CAN and LIN ECU functions: ‹ CAN transceiver and two LIN transceivers ‹ Scalable 3.3 V or 5 V voltage regulator delivering up to 250 mA for a microcontroller and peripheral circuitry; an external PNP transistor can be connected for better heat distribution over the PCB ‹ Separate voltage regulator for the CAN transceiver (5 V) ‹ Watchdog with Window and Timeout modes and on-chip oscillator ‹ Serial Peripheral Interface (SPI) for communicating with the microcontroller ‹ ECU power management system „ Designed for automotive applications: ‹ Enhanced ElectroMagnetic Compatibility (EMC) performance ‹ ±8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) on the CAN/LIN bus pins and the wake-up pins ‹ ±6 kV ElectroStatic Discharge protection IEC 61000-4-2 on the CAN/LIN bus pins and the wake-up pins ‹ ±58 V short-circuit proof CAN/LIN bus pins ‹ Battery and CAN/LIN bus pins are protected against transients in accordance with ISO 7637-3 „ Supports remote flash programming via the CAN bus „ Small 6.1 mm × 11 mm HTSSOP32 package with low thermal resistance „ Pb-free; Restriction of Hazardous Substances Directive (RoHS) and dark green compliant 2.2 CAN transceiver „ ISO 11898-2 and ISO 11898-5 compliant high-speed CAN transceiver „ Dedicated low dropout voltage regulator for the CAN bus: ‹ Independent of the microcontroller supply ‹ Significantly improves EMC performance „ Bus connections are truly floating when power is off „ SPLIT output pin for stabilizing the recessive bus level 2.3 LIN transceivers „ 2 × LIN 2.1 compliant LIN transceivers „ Compliant with SAE J2602 „ Downward compatible with LIN 2.0 and LIN 1.3 „ Low slope mode for optimized EMC performance „ Integrated LIN termination diode at pin DLIN 2.4 Power management „ Wake-up via CAN, LIN or local wake-up pins with wake-up source detection „ 2 wake-up pins: UJA1078A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 2 of 54 NXP Semiconductors UJA1078A High-speed CAN/dual LIN core system basis chip ‹ WAKE1 and WAKE2 inputs can be switched off to reduce current flow ‹ Output signal (WBIAS) to bias the wake-up pins, selectable sampling time of 16 ms or 64 ms „ Standby mode with very low standby current and full wake-up capability; V1 active to maintain supply to the microcontroller „ Sleep mode with very low sleep current and full wake-up capability 2.5 Control and diagnostic features „ Safe and predictable behavior under all conditions „ Programmable watchdog with independent clock source: ‹ Window, Timeout (with optional cyclic wake-up) and Off modes supported (with automatic re-enable in the event of an interrupt) „ 16-bit Serial Peripheral Interface (SPI) for configuration, control and diagnosis „ Global enable output for controlling safety-critical hardware „ Limp home output (LIMP) for activating application-specific ‘limp home’ hardware in the event of a serious system malfunction „ Overtemperature shutdown „ Interrupt output pin; interrupts c.


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