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TTP225 Dataheets PDF



Part Number TTP225
Manufacturers TONTEK
Logo TONTEK
Description 8 KEYS TOUCH PAD DETECTOR IC
Datasheet TTP225 DatasheetTTP225 Datasheet (PDF)

Preliminary TTP225 TonTouchTM 8 KEYS TOUCH PAD DETECTOR IC GENERAL DESCRIPTION The TTP225 TonTouchTM is a touch pad detector IC with open drain output which offers 8 touch keys. The touching detection IC is designed for replacing traditional direct button key with fixed pad size. Low power consumption and wide operating voltage are the contact key features for DC or AC application. FEATURES ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ Operating voltage 2.0V~5.5V Operating current typical 120uA, max 160uA at VDD=3V .

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Preliminary TTP225 TonTouchTM 8 KEYS TOUCH PAD DETECTOR IC GENERAL DESCRIPTION The TTP225 TonTouchTM is a touch pad detector IC with open drain output which offers 8 touch keys. The touching detection IC is designed for replacing traditional direct button key with fixed pad size. Low power consumption and wide operating voltage are the contact key features for DC or AC application. FEATURES ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ Operating voltage 2.0V~5.5V Operating current typical 120uA, max 160uA at VDD=3V The output refresh rate about 85Hz at VDD=3V 64 steps sensitivity selectable (SLSE0~5 pin option) Another have offer 2 kinds of base-step (OPST pin option) Stable touching detection of human body for replacing traditional direct switch key Provides direct mode、matrix mode and serial mode selected by pad option Maximum 8 input pads and 8 outputs for direct mode; Maximum 8 input pads for serial interface mode; Maximum 8 input pads provide fixed 2*4 and 3*3 matrix types Outputs(Q0~Q7) are open drain(active low) After power-on have 0.5~0.7sec stable-time, during the time do not touch the key-pad, And the function is disabled. Auto calibration for life. And the re-calibration period is 0.5~0.7sec. When all keys do not touched. APPLICATION ƒ Wide consumer products ƒ Button key replacement PACKAGE CONFIGURATION NC2 1 48 SLSE5 NC1 2 47 SLSE4 I7 3 46 SLSE3 I6 4 45 SLSE2 NC 5 44 NC NC 6 43 SLSE1 NC 7 42 NC I5 8 41 SLSE0 I4 9 40 VSS I3 10 39 DV I2 I1 I0 11 12 13 TTP225 SSOP-48 38 37 36 Q7 Q6 Q5 OPW0 14 35 Q4 OPW1 15 34 Q3 OPT0 16 33 Q2 NC 17 32 NC OPT1 18 31 OPST NC 19 30 NC NC 20 29 Q1 OSC1 21 28 Q0 VSS 22 27 TEST VDD 23 26 NC3 OPS1 24 25 OPS0 09’/08/25 Page 1 of 15 Ver : 1.3 Preliminary BLOCK DIAGRAM FOR DIRECT MODE : TTP225 TonTouchTM I0 I1 I2 I3 I4 I5 I6 I7 OSC1 TEST SLSE0 SLSE1 SLSE2 SLSE3 SLSE4 SLSE5 Inputs Scan & Switch Reference OSC1 Key Detection Sensor OSC2 8 Sets key de-bounce 8 outputs selection & driver System timing control Sensitivity selection Key-on timing Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 DV OPS0=1 OPS1=1 OPT0 OPT1 OPST OPW0 OPW1 BLOCK DIAGRAM FOR SERIAL INTERFACE MODE : I0 I1 I2 I3 I4 I5 I6 I7 OSC1 TEST SLSE0 SLSE1 SLSE2 SLSE3 SLSE4 SLSE5 Inputs Scan & Switch Reference OSC1 Key Detection Sensor OSC2 8 Sets key de-bounce 8 outputs selection & driver System timing control Sensitivity selection Key-on timing DO(Q0) RST(Q6) CK(Q7) DV OPS0=1 OPS1=0 OPT0 OPT1 OPST OPW0 OPW1 09’/08/25 Page 2 of 15 Ver : 1.3 Preliminary BLOCK DIAGRAM FOR KEY-MATRIX MODE : I0 I1 I2 I3 I4 I5 I6 I7 OSC1 TEST SLSE0 SLSE1 SLSE2 SLSE3 SLSE4 SLSE5 Inputs Scan & Switch Reference OSC1 Key Detection Sensor OSC2 System timing control 8 Sets key de-bounce Sensitivity selection TTP225 TonTouchTM 8 outputs selection & driver Key-on timing Q0(SCN0) Q1(SCN1) Q2(SCN2) Q3(SCN3) Q4(SCN4) Q5(SCN5) DV OPS0=0 OPS1 (3*3 or 2*4) OPT0 OPT1 OPST OPW0 OPW1 09’/08/25 Page 3 of 15 Ver : 1.3 Preliminary TTP225 TonTouchTM PIN DESCRIPTION Pin No. Pin Name Share Pin I/O Type Pin Description 1 NC2 2 NC1 3 I7 4 I6 5 NC 6 NC 7 NC 8 I5 9 I4 10 I3 11 I2 12 I1 13 I0 I Input port I Input port I Input port I Input port I Input port I Input port I Input port I Input port 14 OPW0 I-PH OPW0~1 are option pins to select the windows of key-detected 15 OPW1 I-PH OPW0~1 are option pins to select the windows of key-detected 16 OPT0 I-PH OPT0~1 are option pins to select the time of key-on 17 NC 18 OPT1 I-PH OPT0~1 are option pins to select the time of key-on 19 NC 20 NC 21 OSC1 I/O System oscillator pin 22 VSS 23 VDD P Negative power supply,ground P Positive power supply 24 OPS1 I-PH Output type option pin 25 OPS0 I-PH Output type option pin 26 NC3 27 TEST I-PH Only for test,when normal function must be connected to VSS 28 Q0 (DO/SCN0) I/O/OD Q0 is open drain output pin on direct mode (active low) DO is the shifted data output pin on serial mode (open drain) SCN0 is the first scanning pin on matrix mode 29 Q1 (SCN1) I/O/OD Q1 is open drain output pin on direct mode (active low) SCN1 is the second scanning pin on matrix mode 30 NC 31 OPST I-PH Selecting the base step of sensitivity 32 NC 33 Q2 (SCN2) I/O/OD Q2 is open drain output pin on direct mode (active low) SCN2 is the third scanning pin on matrix mode 34 Q3 (SCN3) I/O/OD Q3 is open drain output pin on direct mode (active low) SCN3 is the fourth scanning pin on matrix mode 35 Q4 (SCN4) I/O/OD Q4 is open drain output pin on direct mode (active low) SCN4 is the fifth scanning pin on matrix mode 36 Q5 (SCN5) I/O/OD Q5 is open drain output pin on direct mode (active low) SCN5 is the sixth scanning pin on matrix mode 37 Q6 (RST) I/OD Q6 is open drain output pin on direct mode (active low) RST is the reset input pin on serial mode 38 Q7 (CK) I/OD Q7 is open drain output pin on direct mode (active low) CK is the clock input pin on serial mode 39 DV O Data valid output signal 40 VSS P Negative power supp.


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