PI6C5946004

PI6C5946004 6 GHz / 12 Gbps Clock / Data Fanout Buffer with Internal Termination Features ÎÎInput Clock Frequency up to 6 GHz Typical ÎÎMaximum Input Data Rate up to 12 Gbps Typical ÎÎ4 pairs of differential CML outputs ÎÎLow additive jitter, < 0.05ps (max) ÎÎInput accepts: CML, LVDS, CML, SSTL input level ÎÎOutput to Output skew: <20ps ÎÎOperating Temperature: -40oC to 85oC ÎÎPower supply: 3.3V ±10% or 2.5V ±5% ÎÎPackaging (Pb-free & Green) ÎÎ16-pin TQFN available Description The PI6C5946004 is a high-performance low-skew 1-to-4 CML clock or data fanout buffer. The inputs accept CML, LVDS, CML and SSTL signals with internal termination resistors. PI6C5946004 is ideal for clock / data distribution applications. Block Diagram Pin Configuration Q0Q0+ VDD GND REF_IN+ VTH REF_IN- EN D Q LE Q0+ Q0- 16 15 14 13 Q1+ Q1- Q1+ 1 12 REF_IN+ Q2+ Q2- Q1- 2 Q3+ Q2+ 3 Q3- Q2- 4 11 VTH 10 VREF-AC 9 REF_IN- 5678 Q3+ Q3VDD EN 14-0179 1 PI6C5946004 Rev A 10/29/14 PI6C5946004 6 GHz / 12 Gbps Clock / Data Fanout Buffer with Internal Termination Pin Description(1) Pin # 1, 2 3, 4 5, 6 7 Name Q1+, Q1Q2+, Q2Q3+, Q3VDD 8 EN 9 10 11 12 13 14 15, 16 REF_IN- VREF-AC VTH REF_IN+ GND VDD Q0+, Q0- Type Output Output Output Power Input Input Output Input Input Power Power Output Description Differential output pair, CML interface level. Differential output pair, CML interface level. Differential output pair, CML interface level. Core Power Supply Synchronous Output Enable, ...